Probability Distributions.- Linear Models for Regression.- Linear Models for Classification.- Neural Networks.- Kernel Methods.- Sparse Kernel Machines.- Graphical Models.- Mixture Models and EM.- Approximate Inference.- Sampling Methods.- Continuous Latent Variables.- Sequential Data.- Combining Models.

Pattern Recognition and Machine Learning

https://users.encs.concordia.ca/~ymzhang/publications/ARC32-2-98Zhang_pp.229-252.pdf

Bibliographical review on reconfigurable fault-tolerant control systems

This ebook is the first authorized digital version of Kernighan and Ritchie's 1988 classic, The C Programming Language (2nd Ed.). One of the best-selling programming books published in the last fifty years, "K&R" has been called everything from the "bible" to "a landmark in computer science" and it has influenced generations of programmers. Available now for all leading ebook platforms, this concise and beautifully written text is a "must-have" reference for every serious programmers digital library.

As modestly described by the authors in the Preface to the First Edition, this "is not an introductory programming manual; it assumes some familiarity with basic programming concepts like variables, assignment statements, loops, and functions. Nonetheless, a novice programmer should be able to read along and pick up the language, although access to a more knowledgeable colleague will help."

The C programming language

With advanced computer technology, systems are getting larger to fulfill more complicated tasks: however, they are also becoming less reliable. Consequently, testing is an indispensable part of system design and implementation; yet it has proved to be a formidable task for complex systems. This motivates the study of testing finite stare machines to ensure the correct functioning of systems and to discover aspects of their behavior. A finite state machine contains a finite number of states and produces outputs on state transitions after receiving inputs. Finite state machines are widely used to model systems in diverse areas, including sequential circuits, certain types of programs, and, more recently, communication protocols. In a testing problem we have a machine about which we lack some information; we would like to deduce this information by providing a sequence of inputs to the machine and observing the outputs produced. Because of its practical importance and theoretical interest, the problem of testing finite state machines has been studied in different areas and at various times. The earliest published literature on this topic dates back to the 1950's. Activities in the 1960's mid early 1970's were motivated mainly by automata theory and sequential circuit testing. The area seemed to have mostly died down until a few years ago when the testing problem was resurrected and is now being studied anew due to its applications to conformance testing of communication protocols. While some old problems which had been open for decades were resolved recently, new concepts and more intriguing problems from new applications emerge. We review the fundamental problems in testing finite state machines and techniques for solving these problems, tracing progress in the area from its inception to the present and the stare of the art. In addition, we discuss extensions of finite state machines and some other topics related to testing.

Principles and methods of testing finite state machines-a survey

Ultrathin films of single-walled carbon nanotubes (SWNTs) represent an attractive, emerging class of material, with properties that can approach the exceptional electrical, mechanical, and optical characteristics of individual SWNTs, in a format that, unlike isolated tubes, is readily suitable for scalable integration into devices. These features suggest the potential for realistic applications as conducting or semiconducting layers in diverse types of electronic, optoelectronic and sensor systems. This article reviews recent advances in assembly techniques for forming such films, modeling and experimental work that reveals their collective properties, and engineering aspects of implementation in sensors and in electronic devices and circuits with various levels of complexity. A concluding discussion provides some perspectives on possibilities for future work in fundamental and applied aspects.

http://www.ifc.dicp.ac.cn/library/cailiao/pdf1/11.pdf

Ultrathin Films of Single-Walled Carbon Nanotubes for Electronics and Sensors: A Review of Fundamental and Applied Aspects

This paper presents a new approach for finding the Unique Input/Output (UIO) sequences of the states in of a finite state machine (FSM). The proposed approach utilizes a different data structure for organizing the search tree. This reduces the amount of time and memory space required for finding the UIO sequences of all states of a FSM. Simulation results on sample benchmark FSMs from MCNC and commercially available protocols are provided. >

An approach for UIO generation for FSM verification and validation

As one of the most promising energy-efficient emerging paradigms for designing digital systems, approximate computing has attracted a significant attention in recent years. Applications utilizing approximate computing (AxC) can tolerate some loss of quality in the computed results for attaining high performance. Approximate arithmetic circuits have been extensively studied; however, their application at system level has not been extensively pursued. Furthermore, when approximate arithmetic circuits are applied at system level, error-accumulation effects and a convergence problem may occur in computation. Multiple approximate components can interact in a typical datapath, hence benefiting from each other. Many applications require more complex datapaths than a single multiplication. In this paper, a hardware/software co-design methodology for adaptive approximate computing is proposed. It makes use of feature constraints to guide the approximate computation at various accuracy levels in each iteration of the learning process in Artificial Neural Networks (ANNs). The proposed adaptive methodology also considers the input operand distribution and the hybrid approximation. Compared with a baseline design, the proposed method significantly reduces the power-delay product while incurring in only a small loss of accuracy. Simulation and a case study of image segmentation validate the effectiveness of the proposed methodology.

/pdf/a-hardware-software-co-design-methodology-for-adaptive-1yno5dhpql.pdf

A Hardware/Software Co-Design Methodology for Adaptive Approximate Computing in clustering and ANN Learning

This article presents new approaches for testing VLSI array architectures used in the computation of the complexN-point Fast Fourier Transform Initially, an unrestricted single cell-level fault model is considered The first proposed approach is based on a process whose complexity is independent (or C- as constant) of the number of cells in the FFT architecture This is accomplished by showing a topological equivalence between the FFT array and a linear (one-dimensional) array The process of fault location is also analyzed The second proposed method is based on a testing process whose complexity is linear with respect to the number of stages (columns) of the FFT array A component-level fault model is also proposed and analyzed The implications of this model on the C-testability process are fully described

On the testability of array structures for FFT computation

This paper presents analytical models for evaluating the overall yield of systems manufactured using fault-tolerant multichip modules (MCMs) for massively parallel computing. In the proposed approaches, we employ a novel Markov model to compute the yield. Unlike a previous method which utilizes a binomial distribution, our scheme can employ intermediate tests. Several strategies for appropriately testing fault-tolerant MCMs have been proposed, but little analytical evaluation has been performed. In this paper, it is shown that an efficient test strategy with a modest level of redundancy may exist to achieve virtually 100% first-pass MCM yield for a particular system. We note that a yield-analysis model employing the LRT (Least Recently Tested) test strategy proposed in this paper may provide a very good figure of merit due to its cost, delivery, number of tests and reliability benefits for today's technology. Extensive parametric results for the analysis are provided to show that our approach can be applied to calculate the overall yield for fault-tolerant MCMs more accurately and efficiently, thereby improving upon the reliability of the entire system.

Yield analysis of fault-tolerant multichip module systems for massively parallel computing

This paper presents a novel approach for fault tolerance of one-time programmable FPGAs by reassignment of routing resouces. As the underlying problem is NP-complete, a greedy algorithm is proposed to provide rapid, but suboptimal solutions. Due to the one-time programmable characteristic of the switches (commonly referred to as antifuses), only unused (fault-free) routing resources must be utilized for reassignment in a chip with a faulty interconnect. We specifically investigate whether reassignment could be accomplished without changing the global routing of any connections. A RC-tree model for the net delay is also presented; delay bounds are established to fully quantify the degradation due to the reassignment. Extensive simulation results are provided.

Fabrizio Lombardi

Papers

An approach for UIO generation for FSM verification and validation

A Hardware/Software Co-Design Methodology for Adaptive Approximate Computing in clustering and ANN Learning

On the testability of array structures for FFT computation

Yield analysis of fault-tolerant multichip module systems for massively parallel computing

Fault tolerance of one-time programmable FPGAs with faulty routing resources