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Guido Groeseneken

Researcher at Katholieke Universiteit Leuven

Publications -  1085
Citations -  29081

Guido Groeseneken is an academic researcher from Katholieke Universiteit Leuven. The author has contributed to research in topics: Gate oxide & CMOS. The author has an hindex of 73, co-authored 1074 publications receiving 26977 citations. Previous affiliations of Guido Groeseneken include Siemens & Liverpool John Moores University.

Papers
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Proceedings ArticleDOI

On the Recovery of Simulated Plasma Process Induced Damage in High-κ Dielectrics

TL;DR: In this article, a detailed analysis of the ability of high-k materials to recover from plasma damage, as simulated by Fowler-Nordheim stress, is presented, and the annealing responses of the technologically relevant HfSiON and HfO2 materials (EOT < 2nm) are correlated with structural differences in these dielectrics, as well as the trap generation rate, centroids and defect de-passivation.
Journal ArticleDOI

Voltage variant source side injection for multilevel charge storage in flash EEPROM

TL;DR: For the first time, this paper shows that source side injection (SSI) is also an excellent candidate for MLCS, with the main advantages of SSI being the very narrow threshold-voltage distributions after SSI programming, the symmetrical threshold- voltage window and the overerase immunity.
Proceedings Article

Deterministic and stochastic component in RESET transient of HfSiO/FUSI gate RRAM stack

TL;DR: In this paper, the authors demonstrate that the minimal achievable IHRS depends on the nature of the filament, quantifiable through the parameter V 0 in the QM conduction model.
Proceedings ArticleDOI

Understanding and prediction of EWF modulation induced by various dopants in the gate stack for a gate-first integration scheme

TL;DR: In this article, a practical model to understand the effective work function (EWF) modulation induced by various dopants is proposed, which can serve as a guideline for understanding the EWF modulation by different dopants and select appropriate gate stack materials for the gate-first technology.