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Guido Groeseneken
Researcher at Katholieke Universiteit Leuven
Publications - 1085
Citations - 29081
Guido Groeseneken is an academic researcher from Katholieke Universiteit Leuven. The author has contributed to research in topics: Gate oxide & CMOS. The author has an hindex of 73, co-authored 1074 publications receiving 26977 citations. Previous affiliations of Guido Groeseneken include Siemens & Liverpool John Moores University.
Papers
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Journal ArticleDOI
Interface Trap Characterization of a 5.8- $\hbox{\rm{ \AA}}$ EOT p-MOSFET Using High-Frequency On-Chip Ring Oscillator Charge Pumping Technique
Moonju Cho,B. Kaczer,Marc Aoulaiche,Robin Degraeve,Philippe Roussel,Jacopo Franco,Thomas Kauerauf,Lars-Ake Ragnarsson,T. Y. Hoffmann,Guido Groeseneken +9 more
TL;DR: In this paper, an accurate approach to determine the interfacial trap density in a 5.8-Å EOT device is performed by an advanced charge pumping technique employing ring-oscillator-connected devices.
Proceedings ArticleDOI
A unified hot carrier degradation model for integrated lateral and vertical nDMOS transistors
TL;DR: In this paper, the hot carrier degradation behavior of integrated lateral and vertical DMOS transistors is analyzed and a unified degradation model is applied to both devices, where the electron mobility decreases due to increased carrier scattering upon D/sub it/ formation; and hot-hole injection and trapping occurs in the drift region.
Proceedings ArticleDOI
Implication of Channel Percolation in Ferroelectric FETs for Threshold Voltage Shift Modeling
Y. Xiang,M. Garcia Bardon,Ben Kaczer,Nur K. Alam,Lars-Ake Ragnarsson,Guido Groeseneken,J. Van Houdt +6 more
TL;DR: In this paper, a domain percolation-based ferroelectric (FE) V TH shift model is presented, in which the source-to-drain clustering of successively flipped-up FE domains, as the global polarization increases with the gate bias, is attributed to the FE-induced V TH lowering.
Proceedings ArticleDOI
A new procedure for lifetime prediction of n-channel MOS-transistors using the charge pumping technique
TL;DR: In this paper, a new procedure is proposed for a reliable lifetime prediction of MOS-transistors under hot-carrier stressing, based on the measurement of the charge pumping current increase during the degradation.
Proceedings ArticleDOI
Hot carrier aging and its variation under use-bias: Kinetics, prediction, impact on Vdd and SRAM
M. Duan,Jian Fu Zhang,Azrif Manut,Zhigang Ji,Weidong Zhang,Asen Asenov,Louis Gerrer,Dave Reid,H. Razaidi,David Vigar,Vikas Chandra,Robert Campbell Aitken,Ben Kaczer,Guido Groeseneken +13 more
TL;DR: In this article, a methodology for evaluating the HCA-induced variation under use-bias is proposed, and the capability of predicting HCA under use bias is experimentally verified.