G
Guido Groeseneken
Researcher at Katholieke Universiteit Leuven
Publications - 1085
Citations - 29081
Guido Groeseneken is an academic researcher from Katholieke Universiteit Leuven. The author has contributed to research in topics: Gate oxide & CMOS. The author has an hindex of 73, co-authored 1074 publications receiving 26977 citations. Previous affiliations of Guido Groeseneken include Siemens & Liverpool John Moores University.
Papers
More filters
Journal ArticleDOI
Optimization of Gate-on-Source-Only Tunnel FETs With Counter-Doped Pockets
Kuo-Hsing Kao,Anne S. Verhulst,William G. Vandenberghe,Bart Sorée,Wim Magnus,Daniele Leonelli,Guido Groeseneken,K. De Meyer +7 more
TL;DR: In this paper, a gate-on-source tunnel FET with a counter-doped parallel pocket under the gate-source overlap was investigated and shown to have a steeper sub-threshold slope and higher ON-current than a gate on the channel.
Journal ArticleDOI
A new model for the field dependence of intrinsic and extrinsic time-dependent dielectric breakdown
TL;DR: In this article, the authors investigated the field acceleration of intrinsic and extrinsic breakdown and proposed a new analytical expression for fitting competing Weibull distributions for low-field oxide reliability.
Journal ArticleDOI
Analysis of trap-assisted tunneling in vertical Si homo-junction and SiGe hetero-junction Tunnel-FETs
Anne Vandooren,Daniele Leonelli,Rita Rooyackers,Andriy Hikavyy,Katia Devriendt,Marc Demand,Roger Loo,Guido Groeseneken,Cedric Huyghebaert +8 more
TL;DR: In this article, the authors report on the integration of vertical nTunnel FETs (TFETs) with SiGe hetero-junction and analyzes the presence of trap-assisted tunneling impacting the device behavior.
Journal ArticleDOI
Drain voltage dependent analytical model of tunnel field-effect transistors
TL;DR: In this paper, the impact of drain voltage on TFET performance was analyzed for both pure line-tunneling and pure point-tuned TFETs, and the model highlights and explains the superlinear onset of the output characteristics, thereby enabling an improved analysis of experimental data.
Journal ArticleDOI
Statistics of Multiple Trapped Charges in the Gate Oxide of Deeply Scaled MOSFET Devices—Application to NBTI
TL;DR: In this article, an exponential distribution of threshold voltage shifts due to a single charge trapped in the gate oxide is observed, resulting in single charge shifts exceeding 30 mV in some of the studied 35-nm-long and 90-nmwide devices.