H. Yang

TL;DR: An unprecedented demonstration of a robust STT-MRAM technology designed in a 2x nm CMOS-embedded 40 Mb array with full array functionality, process uniformity and reliability, and 10 years data retention at 125C with extended endurance to ∼ 107 cycles is presented.

TL;DR: 22-nm FD-SOI 40Mb embedded MRAM (eMRAM) macros for automotive-grade-l (Auto-G1) MCU applications are demonstrated and the effects of magnetic tunnel junction (MTJ) size on reliability and scalability of eMRAM technology beyond 22 nm are examined.

TL;DR: A fully functional embedded MRAM macro integrated into a 22-nm FD-SOI CMOS platform and showing intrinsic stand-by magnetic immunity of 1.4 kOe reveals that eMRAM is capable of serving a broad spectrum of eFlash applications at 22 nm or beyond.

TL;DR: In this paper, the authors investigated the statistical nature of dielectric breakdown in MgO dielectrics for wide range of operating conditions, relevant to its application as spin transfer torque magnetic random access memory (STT-MRAM).

TL;DR: Based on extensive TDDB characterizations, this macro shows sufficient endurance margins for < 1 ppm failure rate after 1E6 cycles, and the feasibility of achieving nearly unlimited endurance for cache-like SRAM applications is examined.