N
N. Balasubramanian
Researcher at Singapore Science Park
Publications - 145
Citations - 3598
N. Balasubramanian is an academic researcher from Singapore Science Park. The author has contributed to research in topics: MOSFET & High-κ dielectric. The author has an hindex of 30, co-authored 138 publications receiving 3491 citations. Previous affiliations of N. Balasubramanian include Massachusetts Institute of Technology & Agency for Science, Technology and Research.
Papers
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Journal ArticleDOI
High-performance fully depleted silicon nanowire (diameter /spl les/ 5 nm) gate-all-around CMOS devices
Navab Singh,Ajay Agarwal,Lakshmi Kanta Bera,Tsung-Yang Liow,R. Yang,S.C. Rustagi,C.H. Tung,Rakesh Kumar,G. Q. Lo,N. Balasubramanian,Dim-Lee Kwong +10 more
TL;DR: In this article, gate-all-around (GAA) n-and p-FETs on a silicon-on-insulator with 5-nm-diameter laterally formed Si nanowire channel were demonstrated.
Proceedings ArticleDOI
Ultra-Narrow Silicon Nanowire Gate-All-Around CMOS Devices: Impact of Diameter, Channel-Orientation and Low Temperature on Device Performance
Navab Singh,Fong Yin Lim,W. W. Fang,S. C. Rustagi,L. K. Bera,Ajay Agarwal,C.H. Tung,Keat-Mun Hoe,S. R. Omampuliyur,D. Tripathi,A. O. Adeyeye,Guo-Qiang Lo,N. Balasubramanian,Dim-Lee Kwong +13 more
TL;DR: Fully CMOS compatible silicon-nanowire (SiNW) gate-all-around (GAA) n- and p-MOS transistors are fabricated with nanowire channel in different crystal orientations and characterized at various temperatures down to 5K as mentioned in this paper.
Journal ArticleDOI
Effect of surface NH3 anneal on the physical and electrical properties of HfO2 films on Ge substrate
Nan Wu,Qingchun Zhang,Chunxiang Zhu,Chia Chin Yeo,S.J. Whang,D.S.H. Chan,M.F. Li,Byung Jin Cho,Albert Chin,Dim-Lee Kwong,Anyan Du,C.H. Tung,N. Balasubramanian +12 more
TL;DR: In this article, a surface annealing step in NH3 ambient before the HfO2 deposition could result in significant improvement in both gate leakage current and the equivalent oxide thickness (EOT).
Journal ArticleDOI
Alternative surface passivation on germanium for metal-oxide-semiconductor applications with high-k gate dielectric
Nan Wu,Qingchun Zhang,Chunxiang Zhu,D.S.H. Chan,Ming-Fu Li,N. Balasubramanian,Albert Chin,Dim-Lee Kwong +7 more
TL;DR: An alternative surface passivation process for high-k Ge metal-oxide-semiconductor (MOS) device has been studied in this paper, where surface SiH4 annealing was implemented prior to HfO2 deposition.
Proceedings ArticleDOI
Enhanced performance in 50 nm N-MOSFETs with silicon-carbon source/drain regions
Kah-Wee Ang,King Jien Chui,Vladimir Bliznetsov,Anyan Du,N. Balasubramanian,Ming-Fu Li,Ganesh S. Samudra,Yee-Chia Yeo +7 more
TL;DR: In this article, a SiC source and drain regions formed by a Si recess etch and a selective epitaxy of SiC in the S/D regions were used to enhance the electron mobility.