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Robert Bogdan Staszewski
Researcher at University College Dublin
Publications - 516
Citations - 13921
Robert Bogdan Staszewski is an academic researcher from University College Dublin. The author has contributed to research in topics: Phase-locked loop & CMOS. The author has an hindex of 57, co-authored 491 publications receiving 12517 citations. Previous affiliations of Robert Bogdan Staszewski include California Institute of Technology & Huawei.
Papers
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Journal ArticleDOI
All-digital PLL and transmitter for mobile phones
Robert Bogdan Staszewski,John Wallberg,Sameh S. Rezeq,Chih-Ming Hung,Oren Eliezer,Sudheer Vemulapalli,C. Fernando,Kenneth J. Maggio,Robert B. Staszewski,N. Barton,Meng-Chang Lee,P. Cruise,Manouchehr Entezari,Khurram Muhammad,Dirk Leipold +14 more
TL;DR: The first all-digital PLL and polar transmitter for mobile phones is presented, exploiting the new paradigm of a deep-submicron CMOS process environment by leveraging on the fast switching times of MOS transistors, the fine lithography and the precise device matching, while avoiding problems related to the limited voltage headroom.
Journal ArticleDOI
All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS
Robert Bogdan Staszewski,Khurram Muhammad,Dirk Leipold,Chih-Ming Hung,Yo-Chuol Ho,John Wallberg,C. Fernando,Ken Maggio,Roman Staszewski,T. Jung,Jinseok Koh,S. John,I. Deng,Vivek Sarda,O. Moreira-Tamayo,Valerian Mayega,Ran Katz,Ofer Friedman,Oren Eliezer,Elida de-Obaldia,Poras T. Balsara +20 more
TL;DR: In this paper, the authors present a single-chip fully compliant Bluetooth radio fabricated in a digital 130-nm CMOS process, which is compatible with digital deep-submicron CMOS processes and can be readily integrated with a digital baseband and application processor.
Journal ArticleDOI
1.3 V 20 ps time-to-digital converter for frequency synthesis in 90-nm CMOS
TL;DR: A 20-ps time-to-digital converter (TDC) realized in 90-nm digital CMOS is used as a phase/frequency detector and charge pump replacement in an all-digital phase-locked loop for a fully-compliant Global System for Mobile Communications (GSM) transceiver.
Book
All-digital frequency synthesizer in deep-submicron CMOS
TL;DR: This paper presents a meta-modelling architecture for Deep-Submicron CMOS that automates the very labor-intensive and therefore time-heavy and therefore expensive and expensive process of manually winding down and restarting the CMOS process.
Journal ArticleDOI
Cryo-CMOS Circuits and Systems for Quantum Computing Applications
Bishnu Patra,Rosario M. Incandela,Jeroen P. G. van Dijk,Harald Homulle,Lin Song,Mina Shahmohammadi,Robert Bogdan Staszewski,Andrei Vladimirescu,Masoud Babaie,Fabio Sebastiano,Edoardo Charbon +10 more
TL;DR: In this paper, a low-noise amplifier for spin-qubit RF-reflectometry readout and a class-F2,3 digitally controlled oscillator required to manipulate the state of qubits are proposed.