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CMOS digital circuit technology

正一 庄司
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The article was published on 1988-01-01 and is currently open access. It has received 175 citations till now. The article focuses on the topics: Diode-or circuit & CMOS.

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Journal ArticleDOI

Low-power CMOS digital design

TL;DR: In this paper, techniques for low power operation are presented which use the lowest possible supply voltage coupled with architectural, logic style, circuit, and technology optimizations to reduce power consumption in CMOS digital circuits while maintaining computational throughput.
Journal ArticleDOI

GOLD: a parallel real-time stereo vision system for generic obstacle and lane detection

TL;DR: The generic obstacle and lane detection system (GOLD), a stereo vision-based hardware and software architecture to be used on moving vehicles to increment road safety, allows to detect both generic obstacles and the lane position in a structured environment at a rate of 10 Hz.
Journal ArticleDOI

On Enhanced Miller Capacitance Effect in Interband Tunnel Transistors

TL;DR: In this article, the transient response of double-gate thin-body-silicon interband tunnel field-effect transistor (TFET) with its metal-oxide-semiconductor field effect transistor counterpart was compared.
Journal ArticleDOI

High-speed parallel CRC circuits in VLSI

TL;DR: It is shown that parallel architectures fall somewhat short of ideal speedups in practice, but they should still enable current CMOS technologies to go well beyond 1 Gb/s data rates.
Journal ArticleDOI

Effective Capacitance and Drive Current for Tunnel FET (TFET) CV/I Estimation

TL;DR: This paper provides an estimate of the effective output capacitance and drive current and a three-point model is proposed to extract the effective drive current from the real-time switching current trajectory in a TFET inverter.
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