Journal ArticleDOI
Design and demonstration of Glass Panel Embedding for 3D System Packages for heterogeneous integration applications
Siddharth Ravichandran,Shuhei Yamada,Shuhei Yamada,Tomonori Ogawa,Tailong Shi,Fuhan Liu,Vanessa Smet,Venky Sundaram,Rao Tummala +8 more
TLDR
This article demonstrates a next-generation high-performance 3D packaging technology with smaller form factor, excellent electrical performance, and reliability for heterogeneous integrati...Abstract:
This article demonstrates a next-generation high-performance 3D packaging technology with smaller form factor, excellent electrical performance, and reliability for heterogeneous integrati...read more
Citations
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Journal ArticleDOI
A Review of 5G Front-End Systems Package Integration
TL;DR: In this paper, the key building blocks of 5G systems and the underlying advances in packaging technologies to realize them are reviewed and a 3D ultrathin packages with higher component densities and performance than with the existing 2D packages is presented.
Posted Content
A Review of 5G Front-End Systems Package Integration
TL;DR: Heterogeneous integration in 3-D ultrathin packages with higher component densities and performance than with the existing 2-D packages is needed to realize 5G systems.
Proceedings ArticleDOI
Large-body-sized Glass-based Active Interposer for High-Performance Computing
TL;DR: This paper describes the fabrication process for a Glass-based active interposer with dies embedded in glass cavities, and a systematic parametric process optimization to improve the surface planarity to demonstrate 2 micron L/S RDL on die-embedded glass substrates.
Proceedings ArticleDOI
Low-Cost Non-TSV Based 3D Packaging Using Glass Panel Embedding (GPE) for Power-Efficient, High-Bandwidth Heterogeneous Integration
Siddharth Ravichandran,Shuhei Yamada,Fuhan Liu,Vanessa Smet,Mohanalingam Kathaperumal,Rao Tummala +5 more
TL;DR: This paper presents, for the first time, a non-TSV based 3D architecture using Glass Panel Embedding (GPE) technology for high-density large package applications achieving excellent bandwidth and power-efficiency that are not possible in current approaches.
Proceedings ArticleDOI
Characterization of Chip-to-Package Interconnects for Glass Panel Embedding (GPE) for Sub-THz Wireless Communications
TL;DR: In this article, the authors presented characterization of microvia interconnects in D-band frequencies for use as chip-to-package interconnections in Glass Panel Embedded (GPE) packages.
References
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Journal ArticleDOI
Wideband frequency-domain characterization of FR-4 and time-domain causality
TL;DR: Measurements for the complex permittivity of FR-4 from power frequencies up to the microwave region are presented and simple closed-form expressions are given that approximate the measured data and provide a causal response in the time domain.
Proceedings ArticleDOI
InFO (Wafer Level Integrated Fan-Out) Technology
TL;DR: Comparison of InFO packages on package with several other previously proposed 3D package solutions shows that InFO_PoP has more optimized overall results on system performance, leakage power and area than others, to meet the ever-increasing system requirements of mobile computing.
Proceedings ArticleDOI
Embedded Multi-die Interconnect Bridge (EMIB) -- A High Density, High Bandwidth Packaging Interconnect
Ravi Mahajan,Robert L. Sankman,Neha M. Patel,Dae-Woo Kim,Kemal Aygun,Zhi-Guo Qian,Yidnekachew S. Mekonnen,Islam A. Salama,Sujit Sharan,Deepti Iyengar,Debendra Mallik +10 more
TL;DR: The EMIB dense MCP technology is a new packaging paradigm that provides localized high density interconnects between two or more die on an organic package substrate, opening up new opportunities for heterogeneous on-package integration.
Patent
Adaptive patterning for panelized packaging
TL;DR: In this article, an adaptive patterning method and system for fabricating panel based package structures is described, where the position of individual device units in a panel or reticulated wafer can be adjusted for by measuring the positions of each individual device unit and forming a unit-specific pattern over each device unit.
Proceedings ArticleDOI
Next generation eWLB (embedded wafer level BGA) packaging
Yonggang Jin,Xavier Baraton,S. W. Yoon,Yaojian Lin,Pandi C. Marimuthu,V. P. Ganesh,Thorsten Meyer,Andreas Bahr +7 more
TL;DR: In this paper, the authors highlight some of the recent advancements in next generation eWLB technologies including multi-RDL, thin e-WLB and extra large eWLP as well as double-side with vertical interconnection.