Journal ArticleDOI
Design and Modeling of Line-Tunneling Field-Effect Transistors Using Low-Bandgap Semiconductors
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TLDR
In this article, the design and modeling of line-tunneling field effect transistors (TFETs) using low-bandgap materials is discussed, and two prime design factors, the source concentration and gate-insulator thickness, are examined both analytically and numerically, showing the minimum tunnel path can serve as a useful indicator for lowbandgap TFETs.Abstract:
The low-bandgap engineering and line-tunneling architecture are the two major techniques to resolve the ON-current issues of tunnel field-effect transistors (TFETs). This paper elucidates the design and modeling of line-tunneling TFETs using low-bandgap materials. Three semiconductors, Ge, InAs, and InSb, are considered as examples to explore their physical operations and analytical models. 2-D device simulations were performed to examine the on/off characteristics. The appropriate operational voltages depend on the associated bandgap of semiconductors. The gate voltage should be larger than the bandgap voltage $(E_{g}/q)$ to ensure high ON-currents, whereas the drain voltage must be less than the bandgap voltage to control OFF-leakages. Because the minimum tunnel path has a key function in determining the tunneling in line-tunneling TFETs, the tunneling current is reformulated in terms of the minimum tunnel path with friendly compact forms. Two prime design factors, the source concentration and gate-insulator thickness, are examined both analytically and numerically, showing the minimum tunnel path can serve as a useful indicator for low-bandgap line-tunneling TFETs.read more
Citations
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Journal ArticleDOI
A new analytical threshold voltage model of cylindrical gate tunnel FET (CG-TFET)
TL;DR: In this article, a new analytical approach is proposed to extract the gate dependent threshold voltage for cylindrical gate tunnel FETs (CG-TFETs) by using peak transconductance change method based on the saturation of tunneling barrier width.
Journal ArticleDOI
A Novel Extended Source TFET with δp+- SiGe Layer
TL;DR: In this paper, an extended source TFET (ES-TFET) with SiGe pocket layer at the edge of source channel junction is proposed, which shows excellent performance improvement over standard TFET.
Journal ArticleDOI
An extensive electrostatic analysis of dual material gate all around tunnel FET (DMGAA-TFET)
TL;DR: In this article, an analytical model of a p-channel dual material gate all around tunnel FET (DMGAA-TFET) is presented and its performance is compared with the conventional GAA-FTET.
Journal ArticleDOI
Oxide thickness-dependent effects of source doping profile on the performance of single- and double-gate tunnel field-effect transistors
TL;DR: In this article, the effect of source doping profile on the performance of single and double-gate germanium TFETs was investigated and it was shown that source concentration on the on-current is stronger with decreasing the equivalent oxide thickness (EOT).
Journal ArticleDOI
An electrostatic analytical modeling of high-k stacked gate-all-around heterojunction tunnel FETs considering the depletion regions
C. Usha,Palanichamy Vimala +1 more
TL;DR: In this paper, the analytical modelling of high-k stacked Gate-All-Around Heterojunction Tunnel Field Effect Transistor (GAA-HJTFET) considering the depletion regions is presented.
References
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Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
TL;DR: Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.
Journal ArticleDOI
Theory of Tunneling
TL;DR: In this paper, the theory of ''direct'' and ''phonon assisted'' tunneling is reviewed and theoretical I-V characteristics are calculated using the constant field model and generalizations to nonconstant field and more complicated band structure models are discussed briefly.
Proceedings ArticleDOI
Double-Gate Strained-Ge Heterostructure Tunneling FET (TFET) With record high drive currents and ≪60mV/dec subthreshold slope
TL;DR: In this paper, a Double-Gate, Strained-Ge, Heterostructure Tunneling FET (TFET) exhibiting very high drive currents and SS < 60 mV/dec was experimentally demonstrated.
Journal ArticleDOI
Overview of Beyond-CMOS Devices and a Uniform Methodology for Their Benchmarking
Dmitri E. Nikonov,Ian A. Young +1 more
TL;DR: Structural and operational principles of multiple logic devices under study within the NRI to carry the development of integrated circuits beyond the complementary metal-oxide-semiconductor (CMOS) roadmap are described, and theories used for benchmarking these devices are overviewed.