Journal ArticleDOI
Microarchitectural design space exploration made fast
TLDR
The key of this approach is utilizing inherent program characteristics as prior knowledge (in addition to microarchitectural configurations) to build a universal predictive model, so that no additional simulation is required for evaluating new programs on new configurations.About:
This article is published in Microprocessors and Microsystems.The article was published on 2013-02-01. It has received 24 citations till now. The article focuses on the topics: Design space exploration & Instrumentation (computer programming).read more
Citations
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Proceedings ArticleDOI
NAPEL: Near-Memory Computing Application Performance Prediction via Ensemble Learning
Gagandeep Singh,Juan Gómez-Luna,Giovanni Mariani,Geraldo F. Oliveira,Stefano Corda,Sander Stuijk,Onur Mutlu,Henk Corporaal +7 more
TL;DR: NAPEL is presented, a high-level performance and energy estimation framework for NMC architectures that leverages ensemble learning to develop a model that is based on micro architectural parameters and application characteristics and is capable of making accurate predictions for previously-unseen applications.
Proceedings ArticleDOI
Predicting Cloud Performance for HPC Applications: a User-oriented Approach
TL;DR: The proposed prediction model is validated for a cloud system implemented with OpenStack and the resulting relative error is below 15% and the Pareto optimal cloud configurations finally found when maximizing application speed and minimizing execution cost on the prediction model are at most 15% away from the actual optimal solutions.
Journal ArticleDOI
Predicting cloud performance for HPC applications before deployment
TL;DR: This work proposes a machine-learning methodology to support the user in the selection of the best cloud configuration to run the target workload before deploying it in the cloud and applies the prediction models to Fortran-MPI benchmarks.
Journal ArticleDOI
DeSpErate++: An Enhanced Design Space Exploration Framework Using Predictive Simulation Scheduling
TL;DR: To efficiently speedup the DSE process while fully exploiting the parallel computing infrastructure, the two techniques need to be combined together in a structured manner and a DSE solution that exploits approximate analytic prediction models to improve the simulation schedule on a parallel computing environment is proposed.
Processor and Platform Evolution for the Next Decade
Shekhar Borkar,Intel Fellow,Pradeep Dubey,Kevin C. Kahn,Intel Senior Fellow,David J. Kuck,Hans Mulder,Stephen S. Pawlowski,Justin R. Rattner +8 more
TL;DR: Based on current requirements and trends, Intel believes that processor and platform architecture needs to move toward a virtualized, reconfigurable CMP architecture with a large number of cores, a rich set of built-in processing capabilities, large on-chip memory subsystem and sophisticated microkernel.
References
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Book
Genetic algorithms in search, optimization, and machine learning
TL;DR: In this article, the authors present the computer techniques, mathematical tools, and research results that will enable both students and practitioners to apply genetic algorithms to problems in many fields, including computer programming and mathematics.
Journal ArticleDOI
A fast and elitist multiobjective genetic algorithm: NSGA-II
TL;DR: This paper suggests a non-dominated sorting-based MOEA, called NSGA-II (Non-dominated Sorting Genetic Algorithm II), which alleviates all of the above three difficulties, and modify the definition of dominance in order to solve constrained multi-objective problems efficiently.
Genetic algorithms in search, optimization and machine learning
TL;DR: This book brings together the computer techniques, mathematical tools, and research results that will enable both students and practitioners to apply genetic algorithms to problems in many fields.
Journal ArticleDOI
Pin: building customized program analysis tools with dynamic instrumentation
Chi-Keung Luk,Robert Cohn,Robert Muth,Harish Patil,Artur Klauser,Geoff Lowney,Steven Wallace,Vijay Janapa Reddi,Kim Hazelwood +8 more
TL;DR: The goals are to provide easy-to-use, portable, transparent, and efficient instrumentation, and to illustrate Pin's versatility, two Pintools in daily use to analyze production software are described.
Proceedings ArticleDOI
Wattch: a framework for architectural-level power analysis and optimizations
TL;DR: Wattch is presented, a framework for analyzing and optimizing microprocessor power dissipation at the architecture-level and opens up the field of power-efficient computing to a wider range of researchers by providing a power evaluation methodology within the portable and familiar SimpleScalar framework.