Journal ArticleDOI
p-n junction peripheral current analysis using gated diode measurements
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TLDR
In this article, a modified method for analysis of the currentvoltage characteristics of a gated diode structure is proposed and validated in order to investigate the peripheral reverse current in a silicon p-n junction diode.Abstract:
A modified method for analysis of the current–voltage characteristics of a gated diode structure is proposed and validated in order to investigate the peripheral reverse current in a silicon p-n junction diode. The peripheral generation current in modern p-n diodes is attributed fully to surface generation underneath the thick field oxide surrounding the structure, which typically contains a high density of interface traps. For a gated diode structure, the current region observed for large gate voltages, VG, is linked to the generation associated with the depletion at the Si-thick SiO2 interface. It will be shown that, compared to the classical analysis, this current step is a better alternative to assess the peripheral generation. The 25 times higher sensitivity of gated diode measurements in this mode allows one to reduce the test device perimeter and dimensions, without penalizing the measurement resolution for interface states. The main advantage of the proposed method is related to the fact that for ...read more
Citations
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Characterization of GigaRad Total Ionizing Dose and Annealing Effects on 28-nm Bulk MOSFETs
Chun-Min Zhang,Farzan Jazaeri,A. Pezzotta,Claudio Bruschini,Giulio Borghello,Federico Faccio,Serena Mattiazzo,Andrea Baschirotto,Christian Enz +8 more
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Pavel Hazdra,J Rubeš,J. Vobecký +2 more
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Defect Analysis in Semiconductor Materials Based on p-n Junction Diode Characteristics
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Peripheral current analysis of silicon p–n junction and gated diodes
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Electrical Performance of Ge Devices
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References
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Journal ArticleDOI
Surface effects on p-n junctions: Characteristics of surface space-charge regions under non-equilibrium conditions
A.S. Grove,D.J. Fitzgerald +1 more
TL;DR: In this article, the surface space-charge region associated with a p-n junction is studied theoretically and experimentally, and the theory of MOS structures is extended to the case where the surface-space charge region is not in equilibrium, which is demonstrated by capacitance and conductance measurements performed on gate-controlled planar silicon diodes.
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Carrier lifetimes in silicon
TL;DR: In this paper, the authors show that surface recombination plays an important role in today's high purity Si and will become yet more important as bulk impurity densities in Si are reduced further.
Journal ArticleDOI
A technique for suppressing dark current generated by interface states in buried channel CCD imagers
TL;DR: A technique for operating buried channel CCD imagers to achieve very low dark current with no loss in optical sensitivity is described, using a 4-phase CCD shift register operated in an imaging mode.
Journal ArticleDOI
Intrinsic carrier concentration and minority‐carrier mobility of silicon from 77 to 300 K
TL;DR: The technique has been extended to measurements down to 77 K and the simultaneous measurement of the minority‐carrier electron mobility utilizing open‐circuit voltage decay measurements.
Journal ArticleDOI
Separation and analysis of diffusion and generation components of pn junction leakage current in various silicon wafers
TL;DR: An analytical method to separate the diffusion and generation components of pn junction leakage currents is developed in this article, where the voltage dependence between reverse current and capacitance in pn junctions is measured and an approximately linear relationship between current density (J) and depletion width (W) is derived.