Journal ArticleDOI
Process and temperature compensation in a 7-MHz CMOS clock oscillator
TLDR
The design and characterization of a process, temperature and supply compensation technique for a 7-MHz clock oscillator in a 0.25-/spl mu/m, two-poly five-metal (2P5M) CMOS process is reported.Abstract:
This paper reports on the design and characterization of a process, temperature and supply compensation technique for a 7-MHz clock oscillator in a 0.25-/spl mu/m, two-poly five-metal (2P5M) CMOS process. Measurements made across a temperature range of -40/spl deg/C to 125/spl deg/C and 94 samples collected over four fabrication runs indicate a worst case combined variation of /spl plusmn/2.6% (with process, temperature and supply). No trimming was performed on any of these samples. The oscillation frequencies of 95% of the samples were found to fall within /spl plusmn/0.5% of the mean frequency and the standard deviation was 9.3 kHz. The variation of frequency with power supply was /spl plusmn/0.31% for a supply voltage range of 2.4-2.75 V. The clock generator is based on a three-stage differential ring oscillator. The variation of the frequency of the oscillator with temperature and process has been discussed and an adaptive biasing scheme incorporating a unique combination of a process corner sensing scheme and a temperature compensating network is developed. The biasing circuit changes the control voltage of the differential ring oscillator to maintain a constant frequency. A comparator included at the output stage ensures rail-to-rail swing. The oscillator is intended to serve as a start-up clock for micro-controller applications.read more
Citations
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Journal ArticleDOI
A 52 $\mu$ W Wake-Up Receiver With $-$ 72 dBm Sensitivity Using an Uncertain-IF Architecture
TL;DR: The design of a 2 GHz receiver using a novel ldquouncertain-IFrdquo architecture, which combines MEMS-based high-Q filtering and a free-running CMOS ring oscillator as the RF LO, is described.
Journal ArticleDOI
Full Passive UHF Tag With a Temperature Sensor Suitable for Human Body Temperature Monitoring
TL;DR: A long-range UHF RF identification (RFID) sensor has been designed using a 0.35- ¿m CMOS standard process that allows the use of the RFID as a batteryless sensor in a wireless human body temperature monitoring system.
Journal ArticleDOI
An On-Chip CMOS Relaxation Oscillator With Voltage Averaging Feedback
TL;DR: An on-chip CMOS relaxation oscillator with voltage averaging feedback using a reference proportional to supply voltage is presented and achieves 7x reduction in accumulated jitter (at 1500th cycle) as compared to a oscillator without VAF.
Journal ArticleDOI
A system-on-chip EPC Gen-2 passive UHF RFID tag with embedded temperature sensor
Jun Yin,Jun Yi,Man-Kay Law,Yunxiao Ling,M.C. Lee,Kwok Ping Ng,Bo Gao,Howard C. Luong,Amine Bermak,Mansun Chan,Wing-Hung Ki,Chi-Ying Tsui,Matthew Ming Fai Yuen +12 more
TL;DR: This paper presents a system-on-chip passive RFID tag with an embedded temperature sensor for the EPC Gen-2 protocol in the 900-MHz UHF frequency band and proposes a dual-path clock generator to support both applications with either very accurate link frequency or very low power consumption.
Journal ArticleDOI
A Low-Voltage Mobility-Based Frequency Reference for Crystal-Less ULP Radios
Fabio Sebastiano,Lucien J. Breems,Kofi A. A. Makinwa,Salvatore Drago,Domine M. W. Leenaerts,Bram Nauta +5 more
TL;DR: The design of a 100 kHz frequency reference based on the electron mobility in a MOS transistor is presented, making it suitable for application in wireless sensor networks (WSN) and less than 1.1% over the temperature range from -22degC to 85degC.
References
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Semiconductor device fundamentals
TL;DR: Semiconductor Models -- A General Introduction, Field Effect Introduction -- the J-FET and MESFET, and Electrostatics -- Mostly Qualitative Formulation.
Journal ArticleDOI
Low-jitter and process independent DLL and PLL based on self biased techniques
TL;DR: In this article, a delay-locked loop (DLL) and phase-locked loops (PLL) designs based upon self-biased techniques are presented, which achieve process technology independence, fixed damping factor, fixed bandwidth to operating frequency ratio, broad frequency range, input phase offset cancellation, and low input tracking jitter.
Book
Mosfet Modeling with Spice: Principles and Practice
TL;DR: The SPICE Modeling and the Dominance of CMOS Technology and the Formalism of Model Building and the Future of Device Models for Circuit Simulation are studied.
Journal ArticleDOI
A metal-oxide-semiconductor varactor
TL;DR: In this paper, a variable capacitance of 3.1 pF nominal value has been realized in a 0.35-/spl mu/m standard CMOS process, and a factor two capacitance change has been achieved for a 2-V variation of the controlling voltage.
Proceedings ArticleDOI
A process and temperature compensated ring oscillator
Yang-Shyung Shyu,Jiin-Chuan Wu +1 more
TL;DR: In this paper, an on-chip oscillator with small frequency variation in a digital 0.6 /spl mu/m CMOS technology is described, which utilizes a bias technique to compensate for the influences on the oscillation frequency caused by both temperature and process variations.