Proceedings ArticleDOI
Programmable single-electron transistor logic for low-power intelligent Si LSI
Ken Uchida,Junji Koga,Ryuji Ohba,Akira Toriumi +3 more
- Vol. 1, pp 162-453
TLDR
It is demonstrated that the combination of Coulomb oscillations with the nonvolatile memory functions offers high programmability for LSIs.Abstract:
Room-temperature-operating single-electron devices work not only as single-electron transistors (SETs) but also as nonvolatile single-electron memories. It is demonstrated that the combination of Coulomb oscillations with the nonvolatile memory functions offers high programmability for LSIs. The power and delay of a programmable SET logic are estimated.read more
Citations
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Journal ArticleDOI
On the application potential of gold nanoparticles in nanoelectronics and biomedicine.
Melanie Homberger,Ulrich Simon +1 more
TL;DR: It is shown here how the unique properties of individual AuNPs and AuNP assemblies can be used to create new functional materials for applications in a technical or biological environment.
Journal ArticleDOI
Analytical modeling of single electron transistor for hybrid CMOS-SET analog IC design
TL;DR: In this paper, a physically based analytical single electron transistor (SET) model is proposed for hybrid CMOS-SET analog circuit simulation, and the model parameters are physical device parameters and an associated parameter extraction procedure is reported.
Journal ArticleDOI
Realization of multiple valued logic and memory by hybrid SETMOS architecture
TL;DR: A novel complimentary metal-oxide-semiconductor (CMOS) single-electron transistor (SET) hybrid architecture, named SETMOS, is proposed, which offers Coulomb blockade oscillations and quasi-periodic negative differential resistance effects at much higher current level than the traditional SETs.
Journal ArticleDOI
Robust circuit and system design methodologies for nanometer-scale devices and single-electron transistors
Alexandre Schmid,Yusuf Leblebici +1 more
TL;DR: It is demonstrated that the proposed design technique offers significantly improved immunity to permanent and transient faults occurring at the transistor level, and that it results in graceful degradation of circuit performance in response to device failures.
Proceedings ArticleDOI
Few electron devices: towards hybrid CMOS-SET integrated circuits
TL;DR: It is shown that combination of CMOS and SET in hybrid ICs appears to be attractive in terms of new functionality and performance, together with better integrability for ULSI, especially because of their complementary characteristics.
References
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Journal ArticleDOI
Silicon single-electron tunneling device fabricated in an undulated ultrathin silicon-on-insulator film
TL;DR: In this paper, a single-electron tunneling device fabricated in an ultrathin (∼3 nm) silicon-on-insulator (SOI) film whose surface is undulated by an alkaline-based solution is reported.
Proceedings ArticleDOI
Single-electron-memory integrated circuit for giga-to-tera bit storage
TL;DR: A single-electron-based integrated circuit is presented and an 8/spl times/8 b memory-cell array demonstrates read/write, ushering in a new phase of research on single-Electron devices.
Proceedings ArticleDOI
Room-temperature operation of multifunctional single-electron transistor logic
TL;DR: In this paper, the authors verified that the function of a SET-pMOS circuit can be programmed from a converter/inverter to an inverter/converter by utilizing a nonvolatile memory function incorporated in the SET.
Journal ArticleDOI
Coulomb Blockade Effects in Edge Quantum Wire SOI MOSFETs.
TL;DR: In this article, a double-gate edge SOI MOSFET was proposed to overcome the phase instability of the Coulomb oscillations due to trapped or floating charges around the SET devices.