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Showing papers on "Biasing published in 1985"


Journal ArticleDOI
TL;DR: In this article, the quantum well self-electrooptic effect devices with a CW laser diode as the light source were shown to have bistability at room temperature with 18 nW of incident power, or with 30 ns switching time at 1.6 mW with a reciprocal relation between switching power and speed.
Abstract: We report extended experimental and theoretical results for the quantum well self-electrooptic effect devices. Four modes of operation are demonstrated: 1) optical bistability, 2) electrical bistability, 3) simultaneous optical and electronic self-oscillation, and 4) self-linearized modulation and optical level shifting. All of these can be observed at room-temperature with a CW laser diode as the light source. Bistability can be observed with 18 nW of incident power, or with 30 ns switching time at 1.6 mW with a reciprocal relation between switching power and speed. We also now report bistability with low electrical bias voltages (e.g., 2 V) using a constant current load. Negative resistance self-oscillation is observed with an inductive load; this imposes a self-modulation on the transmitted optical beam. With current bias, self-linearized modulation is obtained, with absorbed optical power linearly proportional to current. This is extended to demonstrate light-by-light modulation and incoherent-to-incoherent conversion using a separate photodiode. The nature of the optoelectronic feedback underlying the operation of the devices is discussed, and the physical mechanisms which give rise to the very low optical switching energy (∼4 fJ/ μm2) are discussed.

533 citations


Journal ArticleDOI
TL;DR: At low temperatures, the escape rate became independent of temperature with a value that, with no adjustable parameters, was in excellent agreement with the zero-temperature prediction for macroscopic quantum tunneling.
Abstract: The escape rate of an underdamped ($Q\ensuremath{\approx}30$), current-biased Josephson junction from the zero-voltage state has been measured. The relevant parameters of the junction were determined in situ in the thermal regime from the dependence of the escape rate on bias current and from resonant activation in the presence of microwaves. At low temperatures, the escape rate became independent of temperature with a value that, with no adjustable parameters, was in excellent agreement with the zero-temperature prediction for macroscopic quantum tunneling.

297 citations


Journal ArticleDOI
TL;DR: In this article, a tunneling hot-electron transfer amplifier (THETA) based on GaAs-AlGaAs heterojunctions was fabricated and tested, and the results showed that the current gain was approximately 2.3 in a common emitter configuration.
Abstract: Tunneling hot‐electron transfer amplifier (THETA) devices, based on GaAs‐AlGaAs heterojunctions, were fabricated and tested. Hot‐electron transfer (α) through a 1100‐A base in excess of 70% was found at 4.2 K. This resulted in a corresponding current gain ( β) in a common emitter configuration of about 2.3. In the temperature range of 4.2–80 K and under constant biasing conditions, α was nearly temperature independent. Electron energy distributions for motion normal to the layers and electron total energy loss while traversing the device were estimated. Typical widths of the energy distributions were less than 200 meV, and both widths and energy peak positions were only slightly dependent on temperature and initial injection energy.

120 citations


Journal ArticleDOI
TL;DR: In this paper, a new deposition technique, RF/dc sputtering with RF bias for metal, is developed and found to provide sufficient step coverage and moreover, planarity, in an application of the technique to aluminum film deposition, the existence of a resputtering effect was confirmed.
Abstract: Planarization of multilevel interconnection is most effective for achieving a higher packing density. However, it is shown by computer simulation that degradation of metallization step coverage becomes serious as th via aspect ratio increases. Conventional deposition methods, in which emitted particles flow onto the substrate and usually do not migrate, are shown to be inadequate for maintaining sufficient step coverage. A new deposition technique, RF/dc sputtering with RF bias for metal, is developed and found to provide sufficient step coverage and, moreover, planarity. In an application of the technique to aluminum film deposition, the existence of a resputtering effect was confirmed. Aluminum particles were found to deposit primarily near the bottom of the depressions and to fill up th depressions completely, through sputtering at a high bias. Steep, deep grooves and vias with aspect ratios up to were found to be completely filled with the aluminum film by deposition at resputtering rates higher than 50%. It was also found that substrate biasing has a decisive effect on giving aluminum films an almost complete (111) crystallographic texture.

77 citations


Journal ArticleDOI
TL;DR: In this paper, a three-terminal superconducting device composed of a semiconductor-coupled Josephson junction and an oxide-insulated gate is fabricated, which is controlled by the gate bias voltage.
Abstract: A three-terminal superconducting device composed of a semiconductor-coupled Josephson junction and an oxide-insulated gate is fabricated. A p-type Si single-crystal film having a 100-nm thickness is used for the semiconductor layer. Two superconducting electrodes of the Josephson junction correspond to source and drain electrodes of the three-terminal device. Josephson tunneling current flows between source and drain electrodes, and is controlled by the gate bias voltage.

66 citations


Patent
Suwat Thaniyavarn1
26 Sep 1985
TL;DR: An electrooptical polarization mode converter that operates independently of the wavelength of the light being converted is described in this paper. But the converter is not suitable for the use in the optical sensor.
Abstract: An electrooptical polarization mode converter that operates independently of the wavelength of the light being converted. The converter includes a titanium in-diffused waveguide formed in a lithium niobate substrate, but light is propagated in the direction of the optic axis, rather than perpendicular to it as in prior devices. Both transverse-electric (TE) and transverse magnetic (TM) modes experience the same material refractive index, and mode switching can be effected with only minimal phase velocity mismatch, by applying a bias voltage across the waveguide. The phase velocity mismatch is corrected electrooptically by applying an orthogonal electric field to the waveguide, and mode switching and phase velocity correction effects can be controlled independently. The resulting device is not only wavelength independent, but is insensitive to temperature changes, immune to optical damage due to the photorefractive effect and immune to problems often caused by out-diffusion of lithium oxide from lithium niobate.

46 citations


PatentDOI
TL;DR: In this paper, a magnetic transducer using a magnetoresistance effect is described, consisting of a hard magnetic film and a conductive film through which current for applying the transverse biasing magnetic field to the magnetoresistive film flows.
Abstract: Disclosed is a magnetic transducer using a magnetoresistance effect, comprising a magnetoresistive film, a hard magnetic film for applying a transverse biasing magnetic field thereto, and a conductive film through which current for applying the transverse biasing magnetic field to the magnetoresistive film flows. The conductive film may be either in electrical contact with or in electrical insulation from the magnetoresistive film. In this magnetic transducer, even when the heights of the respective constituents have changed, the transverse biasing magnetic field to be applied does not change considerably, and an optimum bias field strength is readily attained.

44 citations


Patent
08 Mar 1985
TL;DR: In this article, an arc suppression circuit for a switch carrying a load current includes a MOSFET having a drain connected to the first contact of the switch and a source connected to a second contact.
Abstract: An arc suppression circuit for a switch carrying a load current includes a MOSFET having a drain connected to a first contact of the switch and a source connected to a second contact of the switch. A biasing capacitor is coupled at one end to the drain and at another end through a damping resistor to the gate, such that when the switch contacts are opened, the interrupted load current passes through the biasing capacitor to charge an inherent gate-to-source MOSFET capacitance for turning on the MOSFET and shunting the load current around the switch. A biasing resistor, connected between the gate and the source of the MOSFET, subsequently discharges the gate-to-source capacitance, turning off the MOSFET and terminating the shunted load current after the contacts of the switch have separated by a distance sufficient to preclude arcing. A zener diode, having its cathode connected to the gate of the MOSFET and its anode connected to the source of the MOSFET, quickly discharges the biasing capacitor when the switch contacts are reclosed.

44 citations


Journal ArticleDOI
TL;DR: In this paper, a new method of plasma potential measurement with a differential emissive probe is presented, where dc heated probes are combined with a feedback loop control circuit to measure plasma potential automatically.
Abstract: We present a new method of plasma potential measurement with a differential emissive probe. The dc heated probes are combined with a feedback loop control circuit to measure plasma potential automatically. In addition, it is shown that connecting to the central point of the filaments reduces the effect on the emissive currents of voltage drops across the filaments. The decay time constant of half‐cycle heated emissive probe current during the off heating cycle is shown to depend on the initial emission current and on the bias voltage.

43 citations


Journal ArticleDOI
TL;DR: In this paper, the effect of gate area modulation on charge-pumping current has been analyzed on the basis of the Shockley-Read-Hall theory of trapping, and a model describing the effect for any trapezoidal gate waveform and any reverse biasing source voltage is derived.
Abstract: Interface-trap charge-pumping effect is analysed on the basis of Shockley-Read-Hall theory of trapping, and a model describing the effect for any trapezoidal gate waveform and any reverse biasing source voltage is derived. A simplified version of the model which is valid for identical rise and fall times is also presented and experimentally verified. Experimental results indicate that the spatial variation of surface potential and the modulation of effective gate area by source voltage may strongly influence the charge-pumping current. It is also shown that the effect of gate-area modulation can be characterized directly from charge-pumping measurements.

42 citations


Journal ArticleDOI
Massimo V. Fischetti1, Bruno Ricco1
TL;DR: In this paper, the Fowler-Nordheim tunneling electron injection is performed at 295 and 77 K in metaloxide-semiconductor capacitors, and the positive charge generated at the Si-SiO2 interface is found to be the anomalous positive charge related to the slow states.
Abstract: Fowler–Nordheim tunneling electron injection is performed at 295 and 77 K in metal‐oxide‐semiconductor capacitors. In both cases the positive charge generated at the Si‐SiO2 interface is found to be the ‘‘anomalous’’ positive charge related to the slow states. At low temperature this charge is created at a faster rate than at 295 K for both positive and negative polarity. Its saturated density, on the contrary, strongly depends on the polarity of the applied bias voltage at low temperature, being much smaller during injection at positive bias. Fast and slow states appear only after the sample is heated to room temperature. While interband impact ionization is ruled out as a possible generation mechanism, the results are consistent with the idea that the hot injected electrons lose their energy at the anode‐SiO2 interface by emitting an unidentified species which is responsible for the generation of the interfacial damage. A field‐ and temperature‐activated migration of the positive defects from the sites ...

Patent
30 Dec 1985
TL;DR: In this paper, a compact arrangement in which the disc cartridge holder is compactly accommodated beneath the disc clamp member and the magnetic field biasing device during the loading of a record disc was proposed.
Abstract: In an optical magnetic recording and reproducing apparatus including a disc clamp member and a magnetic field biasing device, the disc clamp member and the magnetic field biasing device are pivotably supported by separate supporting members so as to undergo pivotal movement independently of one another with respect to a disc cartridge holder. This enables a compact arrangement in which the disc cartridge holder is compactly accommodated beneath the disc clamp member and the magnetic field biasing device during the loading of a record disc.

Patent
27 Sep 1985
TL;DR: In this article, an n-well, n-channel polysilicon-gated FET was proposed to protect the circuitry of an integrated circuit from an electrostatic discharge into an output pin of the chip.
Abstract: An integrated circuit device for protecting the circuitry of an integrated circuit from an electrostatic discharge into an output pin of the chip is disclosed. In a preferred embodiment, the device comprises an n-well, n-channel, polysilicon-gated FET structure, which operates in a punch-through mode, coupled to an output pad and an output buffer of the circuit. Back biasing in the chip system affords additional inhibition to turn-on during normal system operation.

Patent
23 Dec 1985
TL;DR: In this paper, a display apparatus consisting of a first substrate provided with a thin film transistor array as a driving switching element and a second substrate providing with another electrode, produces a display by electro-optical change generated between these substrates.
Abstract: A display apparatus comprises a first substrate provided with a thin film transistor array as a driving switching element and a second substrate provided with another electrode, and produces a display by electro-optical change generated between these substrates. Visibility of the display is improved in such a way that rays of light incident on the display apparatus are converted into diffusion light. Photoconductive material, in particular amorphous silicon, can be used by covering semiconductive portions of the thin film transistor array of the display apparatus with an intercepting member. In a display apparatus using a thin film transistor array as a driving switching element, a conductive surface electrically insulated from gate lines on a substrate on where the gate lines for the thin film transistor array are formed, such conductive surface acts as a counter electrode of capacitors for storing charge. Therefore the counter electrode of capacitors is separately formed from gate lines, and writing driving voltage can be set without taking effects of voltage change of gate lines into consideration. Shading layers comprising a plurality of color filters also cover each of the thin film transistors.

Journal ArticleDOI
TL;DR: In this paper, the authors present the dynamics of latchup turn-on behavior in scaled CMOS structures using an exact time-dependent and two-dimensional numerical analysis based on the finite-difference approach.
Abstract: This paper presents the dynamics of latchup turn-on behavior in scaled CMOS structures using an exact time-dependent and two-dimensional numerical analysis based on the finite-difference approach. Both the dynamics of surface-induced latchup triggering by a parasitic PMOSFET and direct forward biasing are examined to discuss the two-dimensional effects of parasitic devices in a scaled CMOS structure during latchup turn-on. In the case of an n-well scaled CMOS, the two-dimensional nature of the well structure plays an important role for surface-induced latchup.

Patent
Andreas Rusznyak1
07 Mar 1985
TL;DR: In this paper, a CMOS power on detection circuit is described, which includes pairs of complementary MOS transistors being connected in series between two supply lines, each pair of transistors includes a long and a short channel transistor.
Abstract: A CMOS power on detection circuit is described which includes pairs of complementary MOS transistors being connected in series between two supply lines. Each pair of transistors includes a long and a short channel transistor. Biasing the transistors by the rising supply voltage and by the voltages on the nodes formed by the pairs respectively allows to reduce or to cut current consumption once the detection is performed.

Patent
02 Jul 1985
TL;DR: In this article, a bias current circuit adapted to superimpose bias current from a bias oscillator on a recording signal and to supply a resultant signal to a magnetic head is presented.
Abstract: In a magnetic recording circuit with a bias current circuit adapted to superimpose a bias current from a bias oscillator (22) on a recording signal and to supply a resultant signal to a magnetic head (4), there are provided a resistor (5) for detecting the bias current flowing through the magnetic head, a rectifier circuit (24) for rectifying and smoothing a signal developing across the resistor, and a control circuit (25) for comparing the output voltage of the rectifier circuit with a reference voltage (Vref) and producing an output signal which controls the oscillation level of the bias oscillator, whereby the bias current flowing through the magnetic head can automatically be set to a predetermined level A variable resistor (3) for adjustment of the bias current and adjustment step for the variable resistor can be dispensed with

Journal ArticleDOI
TL;DR: In this paper, a series of technical data on the preparation of oriented PbTiO3 ferroelectric thin films on Si wafer by rf sputtering have been presented.
Abstract: A series of technical data on the preparation of oriented PbTiO3 ferroelectric thin films on Si wafer by rf sputtering have been presented. Two kinds of approaches have been tried to improve crystalline properties of the PbTiO3 films. Firstly, highly-oriented CaF2 and SrF2 films have been grown on Si wafer as a buffer layer by electron beam evaporation at 400–600°C. The PbTiO3 film on the SrF2/(100) Si and CaF2/(111) Si have been oriented in (100) and (110) & (101) directions, respectively. Secondly, negative DC bias voltage has been applied to the Si substrate during the sputtering of PbTiO3. The obtained films are highly-oriented and their dielectric properties are improved with increase of the bias voltage. Surface of the obtained film is very smooth.

Patent
31 Jul 1985
TL;DR: In this article, a voltage reference circuit for providing a temperature compensated voltage at an output thereof comprises a pair of transistor operated at different current densities for producing a first and second voltages having complementary temperature coefficients and circuitry for combining the two voltages to produce the voltage.
Abstract: A voltage reference circuit for providing a temperature compensated voltage at an output thereof comprise a pair of transistor operated at different current densities for producing a first and second voltages having complementary temperature coefficients and circuitry for combining the two voltages to produce the temperature compensated voltage. A pair of load resistors are connected to the collectors of the two transistors for sourcing currents thereto and a feedback circuit, including a differential amplifier coupled to the respective collectors, provides a feedback signal for adjusting the potential on the bases thereof to maintain different current densities in the two transistors. A bias circuit operates in conjunction with the differential amplifier to bias the same in a balanced operating state whenever the currents in the transistors are substantially equal.

Journal ArticleDOI
TL;DR: Ferromagnetic resonance (FMR) absorption was observed in a spherical single-crystal sample of Y3Fe5O12 (YIG) at 9.5 GHz and room temperature as mentioned in this paper.
Abstract: Ferromagnetic resonance (FMR) absorption was observed in a spherical single‐crystal sample of Y3Fe5O12 (YIG) at 9.5 GHz and room temperature. Resonance absorption curves were obtained as a function of microwave power level and duty cycle for different static field directions relative to the crystal axes. Foldover effects and other nonlinear behavior were seen at microwave field amplitudes (hrf) between 9 and 50 mOe with the applied static field in the (110) plane. When FMR absorption is observed with a high power cw signal (hrf=50 mOe) with the biasing field along either the [100] or the [110] directions and decreasing in magnitude, an absorption curve is obtained that has a long broad shoulder which is shifted below the low power FMR biasing field position. With increasing field in these directions, the absorption curve develops a cusp below the low power biasing field position. With the bias field in the [111] direction the absorption curve shows cusps for both increasing and decreasing fields at this p...

Patent
Jr. Harry A. Gill1
01 Apr 1985
TL;DR: In this article, a pair of transistors having collector electrodes connected together at an output terminal and emitter electrodes coupled to opposite potentials of a voltage supply, a current source, and a resistor is coupled between the voltage supply and an emitter of one of the transistors.
Abstract: An electronic circuit is provided comprising: a pair of transistors having collector electrodes connected together at an output terminal and emitter electrodes coupled to opposite potentials of a voltage supply; a current source; and, means, responsive to a current produced by the current source, for establishing bias currents to base electrodes of the pair of transistors in accordance with an input signal, such bias currents being dependent on the current produced by the current source and being substantially independent of, over a nominal operating supply voltage range of the circuit, of variations in the voltage supply. With such arrangement, since the bias current to the transistors are provided from a current source, the bias currents are independent of the voltage supply and the circuit may operate with less than a one volt voltage supply. In accordance with a preferred embodiment of the invention, a resistor is coupled between the voltage supply and an emitter of one of the pair of transistors. With such arrangement current gain is provided. Further, the supply voltage may be as low as 2V CE (SAT) +IR where IR is the voltage drop across the resistor, typically 30 millivolts. Hence, the minimum supply voltage is still less than one volt.

Journal ArticleDOI
TL;DR: In this article, the SAL and the MR are treated as coupled Stoner-Wohlfarth particles and a theoretical description is given to include misorientation of the anisotropy axes and to include all applied field directions in the plane of the device.
Abstract: Various biasing techniques have been proposed for vertical magnetoresistive stripe detectors to improve their linearity. In the soft-adjacent- layer design, a high-permeability film (SAL) is located close to a magnetoresistive stripe (MR). The sense current in the MR magnetizes the SAL, which in turn generates a magnetostatic bias field at the MR. Thin-film heads based on the SAL concept have been fabricated on sapphire, using conventional methods, and tested. A theoretical description in which the SAL and the MR are treated as coupled Stoner-Wohlfarth particles has been generalized to include misorientation of the anisotropy axes and to include all applied field directions in the plane of the device. This provides a convenient description of the magnetic characteristics in uniform fields. For track widths of 39 μm, the 3.1 kHz slot RMS-signal-to-RMS-noise ratio at 80 KFCI and 19.1 cm/sec is 45 dB and is tape-noise limited. Barkhausen instability is evident at lower bit densities where the fields from the transitions are large, but is not a limiting factor at 80 KFCI. A comparison of the signal spectra with that of an externally biased head demonstrates that the bias angle across the element height is more uniform with SAL biasing.

Patent
12 Feb 1985
TL;DR: In this article, a CMOS device which avoids latchup in the power-up mode as well as in the normal operating mode is provided, which is provided with an on-chip back bias generator which greatly reduces the possibility of forward biasing parasitic NPNP transistors in normal operation.
Abstract: A CMOS semiconductor device which avoids latchup in the powerup mode as well as in the normal operating mode is provided. The device is provided with an on-chip back bias generator which greatly reduces the possibility of forward biasing parasitic NPNP transistors in normal operation. During the powerup mode, before the backbias voltage becomes effective, a clamp diode provided in integrated form outside a guardring surrounding the circuit elements is effective to clamp a large negative voltage that may be created by a "hot-socket" connection to an output. In a modified form of the invention, a junction field effect transistor is provided to prevent forward biasing of the parasitic transistors in a somewhat different manner.

Journal ArticleDOI
TL;DR: In this paper, the authors investigated the fundamental electrostrictive properties of a Pb(Mg1/3Nb2/3)O3-based ceramic stacked actuator, including the local distribution of the strain induced in the sample, the bias voltage dependence of the effective piezoelectric coefficient, the response speed of the displacement to an applied voltage, and the dependence on pressure and temperature.
Abstract: This paper reports a precise investigation of the fundamental electrostrictive properties of a Pb(Mg1/3Nb2/3)O3-based ceramic stacked actuator, including the local distribution of the strain induced in the sample, the bias voltage dependence of the effective piezoelectric coefficient, the response speed of the displacement to an applied voltage, and the dependence on pressure and temperature. It was found that an applied voltage deforms the stacked actuator non-uniformly in an arc contour on the driving face. The 7 mm-thick device can generate a displacement up to 8.5 µm under a voltage of 1 kV with a 10 µs response. The maximum generative force reaches 1.7×104 N for a driving area of 3.8 cm2.

Journal ArticleDOI
TL;DR: In this article, an approach is presented to obtain stable, dc currentvoltage (I•V) curves by using a damped microwave circuit to prevent device oscillations which distort the measured I•V curve.
Abstract: Microwave oscillations in double barrier GaAs‐AlxGa1−xAs resonant tunneling heterostructures have been investigated. In this letter an approach is presented to obtain stable, dc current‐voltage (I‐V) curves by using a damped microwave circuit to prevent device oscillations which distort the measured I‐V curve. Numerical calculations confirm that if oscillations are allowed while making an I‐V measurement, the measured current is the sum of the stable, bias current plus the rectified component of the oscillating current. In addition, the first room‐temperature high Q microwave oscillations in resonant tunneling heterostructures are reported, as opposed to relaxation oscillations previously published. At 77 K, the highest power levels and efficiencies that have been achieved to date are presented.

Journal ArticleDOI
TL;DR: In this article, the magnetic properties of a magnetoresistive thin-film sensor biased using a permanent magnet thin film were investigated and the output of the sensor was very high.
Abstract: Magnetic characteristics have been investigated for a magnetoresistive thin‐film sensor biased using a permanent magnet thin film. Here, Co‐Pt thin film is applied to the device as a bias film. Such microlithographed Co‐Pt thin films show the same magnetic properties as as‐sputtered films. Biasing strength depends on the permanent magnet film thickness, its composition or magnetic properties, and the biasing angle. The output of the sensor is very high.

Patent
25 Mar 1985
TL;DR: In this paper, a disclosed solid state image pick-up element is constructed by a lateral static induction transistor in which source and drain regions thereof are arranged in a surface of a semiconductor layer formed on a substrate and a gate region for storing a light charge completely surrounds at least one of the source region and the drain region, whereby a source-drain current flows in parallel with the surface of the semiconductor layers.
Abstract: A disclosed solid state image pick-up element is constructed by a lateral static induction transistor in which source and drain regions thereof are arranged in a surface of a semiconductor layer formed on a substrate and a gate region for storing a light charge completely surrounds at least one of the source region and the drain region, whereby a source-drain current flows in parallel with the surface of the semiconductor layer. Moreover, a disclosed solid state image sensor utilizing the solid state image pick-up element mentioned above further includes a biasing means for inversely biasing the source and drain regions during a light signal storing period.

Journal ArticleDOI
TL;DR: In this article, a high rate high efficiency sputtering cathode which produces a relatively high bias current has been developed, which is used to prepare Al-1%Si films with substrate bias voltages in the range 0 −150 V d.c.

Patent
06 Sep 1985
TL;DR: In this paper, a substrate bias generator is proposed, in which the junction point of capacitance and the diode of the charge pump is connected to the earth point of the circuit and of the further circuit on the substrate for which the bias is generated.
Abstract: A substrate bias generator in which the junction point of the capacitance and the diode of the charge pump is connected to the earth point of the circuit (and of the further circuit on the substrate for which the bias is generated) via two or more series-connected transistors. During the charging period of the capacitance the transistors are (fully) conductive, hence the capacitance is optimally charged as the conductive transistors cause no (or hardly any) voltage drop. During the pumping cycle all transistors are diode-connected, bringing about a negative voltage with respect to the earth point at the junction point, which negative voltage is limited by the sum of the threshold voltages of the diode - connected transistors.

Journal ArticleDOI
TL;DR: Porphyrin sandwich cells (substrate/Al/MgTPP/Ag) were prepared and studied in ultrahigh vacuum as discussed by the authors. But without the oxide layer, the Ag is islanded.
Abstract: Porphyrin sandwich cells (substrate/Al/MgTPP/Ag) (MgTPP = magnesium tetraphenylporphyrin) were prepared and studied in ultrahigh vacuum. It was found that an oxide layer is needed on the Al for a functioning Ag electrode to be formed, and without the oxide layer the Ag is islanded. With an oxide layer present, two devices with C approx. = 20 nF were prepared and carefully studied. Resistance is low until shunts are burned out by pulse biasing the device. R1 (defined as V/I at 1 V) varied from 1 k Omega to 1 M Omega depending on the history. I-V curves are nonlinear and symmetric, curving upward at higher voltages, until the devices are exposed to both oxygen and water vapor at pressures comparable to that of ambient air. Neither rectification nor a photovoltaic response is observed prior to exposure to both oxygen and water vapor; in one case a photovoltaic response was observed in the absence of a rectifying I-V curve. Capacitance/voltage measurements are consistent with its characterization as a MIS (metal-insulator-semiconductor) device. These observations are explained by a photoelectrochemical process involving water-catalyzed Al oxidation by O2 and photogenerated porphyrin cation charge carriers. 29 references, 4 figures.