Showing papers on "Fabrication published in 1977"

The fitting and fabrication of a custom resin artificial eye

Abstract: An orderly, sequential technical procedure provides the prosthetist with the capability of fabricating and fitting a custom resin eye. The ocular prosthesis is esthetically natural to the patient and to the observer and is durable and stable for many years of use.

Hydrogen annealing process for stabilizing metal-oxide-semiconductor structures

Abstract: Variations in threshold voltage of Metal-Oxide-Silicon (MOS) structures are attenuated by the inclusion in the fabrication process of a hydrogen anneal step using a temperature range of 650 degrees C≦T≦950 degrees C. This anneal step is designed to be the last step in the fabrication process which is performed at temperatures above 600 degrees C.

Some prospective applications of silicon electrodeposition from molten fluorides to solar cell fabrication

Abstract: Electrodeposition of both epitaxial and polycrystalline continuous films of dense, coherent, and well-adherent silicon coatings was achieved from molten fluorides. A dissolving Si anode and an operating temperature of about 750 C were utilized. Silicon electrocrystallization epitaxy (ECE) produced films with the (111) orientation on Si substrates of the same orientation. The unintentionally doped films were of p-type character with a resistivity in the range 0.05 - 0.10 Ω-cm. Polycrystalline Si films were similarly electroplated onto various polycrystalline metal substrates. Uniform coherent, and well-adherent coatings with grain diameters as large as 40 – 50 µm were obtained. The useful rate of electrodeposition of Si could be significantly increased by the application of an alternating square wave pulse (ASWP)2technique. Cathodic current pulses as high as 300 mA/cm2 (growth rate of about 5 µm/min) were demonstrated. The cathodic current efficiencies, for all modes of growth, were about 70 – 100%. The effects of the various operating parameters, and some prospective applications to the fabrication of solar cells, are discussed.

Dry processing of high resolution and high aspect ratio structures in GaAs-Al(x)Ga(1-x) As for integrated optics.

Abstract: The properties of ion-beam milling, rf-sputter etching, and plasma etching for the fabrication of high resolution integrated optical structures in GaAs and AlxGa1−xAs were investigated. The ion-beam milling rates for a 500-eV Ar beam were measured as a function of the angle of incidence for A2-1350 photoresist, GaAs, Al, Ti, and Ta in vacuum. For Ti and Ta, the ion-beam milling rates were measured for various O2 partial pressures in the target chamber. For the fabrication of high-resolution patterns, a technique was developed in which a very thin resist pattern is transferred by plasma etching into a layer of Ta prior to ion-beam milling. Both ion-beam milling and rf-sputter etching through the Ta metal mask were used for the fabrication of gratings in GaAs. From measurements made in this study, it was found that rf-sputter etching in an Ar atmosphere results in a resolution comparable to ion-beam milling at normal incidence, but the material removal efficiency is somewhat lower. Third-order Bragg diffraction gratings (period = 0.36–0.37 μm) for GaAs-AlxGa1−xAs heterostructure lasers and ridged stripes 10 μm wide and 1.5–2.0 μm deep have been prepared by these techniques. High-aspect ratio or skewed-profile gratings were obtained by selection of the ion-beam milling or rf-sputter etching conditions. As previously reported, these structures have been overgrown by MBE AlxGa1−xAs layers to form distributed feedback lasers.

Conduction-cooled circuit package

Abstract: A circuit package exhibiting an excellent heat transfer path from a semiconductor chip or other heat-generating device to the heat-sink can or cover of the package. A heat-conducting pad is metallurgically bonded to either said cover or a surface of said device; the pad is also separably attached, but metallurgically unbonded, to the other. In one preferred embodiment, a readily deformable metal or alloy, such as indium, is metallurgically bonded to a limited central region of the heat sink cover. The deformable metal is separably attached to a major surface of the chip so that there is no stress between the chip or its joints and the solder during the electrical operation of the chip when it generates heat. The preferred method of fabrication involves the mechanical deformation of a mass of solder against the back side of the chip, after the solder has been metallurgically bonded to heat sink. The process may be accomplished either at high or low temperatures, depending upon the solder composition and the relative strength of the leads which join the chip to conductive lands on its supportive substrate.

Fabrication of photovoltaic devices by solid phase epitaxy

Abstract: Fabrication of photovoltaic devices by solid phase epitaxy; devices produced by this method consisting of a semiconductor base and a semiconductor junction-forming epitaxial layer. The epitaxial layer grown by solid phase means from a metal-semiconductor alloy or from a sandwich structure of semiconductor/metal on the semiconductor base.

Coated fuel particles: requirements and status of fabrication technology

Abstract: Fuel cycle, design, and irradiation performance requirements impose restraints on the fabrication processes. Both kernel and coating fabrication processes are flexible enough to adapt to the needs ...

Lithographic offset alignment techniques for RAM fabrication

Abstract: Lithographic offset alignment techniques for MOS dynamic RAM memory cell fabrication to enable increased packing density while maintaining the minimum patterned geometry. Technique of cell fabrication involves initial oxidation of P-type silicon, for example, followed by silicon nitride deposition. Thereafter, moats are etched using the composite silicon dioxide-silicon nitride layers, followed by boron deposition or ion implantation in regions of the silicon substrate exposed by the etching treatment. The moats are then filled by oxidation to form a large field deposit of silicon dioxide extending above the level of the oxide layer in the regions where the moats were formed. The remaining composite silicon dioxide-silicon nitride layers are then removed, followed by gate oxidation. A P-type ion implant is provided beneath the thin oxide region between the regions to be overlaid by a polysilicon electrode and the thick field oxide of the succeeding cell. Thereafter, polysilicon is deposited and patterned, the patterned polysilicon electrode covering a fraction of the P-type implant. The gate oxide is then removed by etching, followed by N+ diffusion or ion implantation in the exposed region of the P-type implant to define a bit line having a length less than the minimum patterned geometry. Oxide is then applied by chemical vapor deposition, followed by a deposit of metal or polysilicon and patterning as required. The offset alignment of the polysilicon electrode with respect to the P-type implant creates the smaller dimension for the sense line. A fabrication technique for the CC RAM having an implanted storage region and a fabrication technique for a double-level polysilicon cell both using offset alignment techniques are also disclosed.

Binary phase digital reflection holograms - Fabrication and potential applications

Abstract: A novel technique for the fabrication of binary-phase computer-generated reflection holograms is described. By use of integrated circuit technology, the holographic pattern is etched into a silicon wafer and then aluminum coated to make a reflection hologram. Because these holograms reflect virtually all the incident radiation, they may find application in machining with high-power lasers. A number of possible modifications of the hologram fabrication procedure are discussed.

Fabrication of Zirconium Alloys into Components for Nuclear Reactors

Abstract: Over 80 percent of the world's annual output of zirconium is fabricated into components for nuclear reactors. In 1976 the CANadian Deuterium Uranium (CANDU) power reactor program will require nearly 500 Mg of zirconium and by 1986 the requirement will have risen to nearly 800 Mg. Most of this is fabricated into tubes which can cost as much as $80/kg. Small thin walled tubes for fuel cladding are fabricated by heavily cold working extruded tubes. The most important fabrication parameter in producing the desired crystallographic texture, hydride orientation, and mechanical properties is the cold reduction route. The deformation also must be controlled carefully to ensure that these properties are uniform, both through the wall thickness and around the circumference of the tube. Large-diameter thin-walled tubes are used to guide coolant flow, guide control rods, or for calandria tubes. These tubes can be made by seam welding annealed sheet and they can be made to very close dimensional tolerances. The weld and heat-affected zones must be recrystallized by cold work and heat treatment so that they have adequate ductility after irradiation. Pressure containment tubes usually are fabricated by hot extrusion and cold worked a limited amount to size. The most important fabrication parameters are the forging and extrusion processes because they determine the crystallographic texture and the microstructure of the tubes. The advantages of different fabrication techniques and the properties of the tubes are discussed.

Composite channel field effect transistor and method of fabrication

Abstract: An improved composite channel field effect transistor and method of fabrication, which exhibits high density characteristics and yields high performance with less sensivity to threshold shift due to hot electrons when operated at high source to drain voltage levels.

Large high-density monolithic XY-addressable arrays for flat-panel LED displays

Abstract: A large-area XY -addressable matrix display has been designed and fabricated. This display consists of 4 tiles, each a ½ in × ½ in array of 30 × 36 LED's, end-stacked to form a continuous dot-matrix display, ½ in × 2 in of 30 × 144 LED's. This paper discusses the design considerations, the fabrication technique used, and the yields experienced in fabricating these displays. The yield of perfect tiles was 5 percent. Using as an acceptance criteria, tiles with no more than 4 LED's either out or dim and using repair techniques described herein, yields of 54 percent have been achieved.

Dual plane barrier-type two-phase CCD

Abstract: A charge coupled device having geometries suitable for fabrication in high density packages (64,000 bits per chip--1,000,000 bits per chip) is comprised of a semiconductor substrate having dopant impurity atoms of a first type and a first surface. A charge transfer channel lies in the substrate near the first surface; and it is overlaid by an insulating layer of non-uniform thickness. A plurality of first and second electrodes lie on the insulating layer traversely to the channel. A barrier region of dopant impurity atoms of the first type lies under each of the electrodes. The non-uniform insulating layer underlies each of the first electrodes by a first uniform thickness, underlies the second electrodes by a second uniform thickness, and separates the each of the first and second electrodes by approximately the second thickness. The second thickness is 20%-60% greater than the first thickness to greatly reduce inter-electrode shorts in high density packages. A shallow layer of dopant atoms of a second type opposite to the first type may be provided under the second electrodes to compensate for flatband voltage shifts due to the thick insulating layer.

Materials and techniques for spacecraft static charge control

Abstract: An overview of the design, development, fabrication, and testing of transparent conductive coatings and conductive lattices deposited or formed on high resistivity spacecraft dielectric materials to obtain control static charge buildup on spacecraft external surfaces is presented. Fabrication techniques for the deposition of indium/tin oxide coatings and copper grid networks on Kapton and FEP Teflon films and special frit coatings for OSR and solar cell cover glasses are discussed. The techniques include sputtering, photoetching, silkscreening, and mechanical processes. A facility designed and built to simulate the electron plasma at geosynchronous altitudes is described along with test procedures. The results of material characterizations as well as electron irradiation aging effects in this facility for spacecraft polymers treated to control static charge are presented. The data presents results for electron beam energies up to 30 kV and electron current densities of 30 nA/cm squared. Parameters measured include secondary emission, surface leakage, and through the sample currents as a function of primary beam energy and voltage.

Improved fabrication technique for applying coatings to optical fiber waveguides (A)

Abstract: Optical fibers must be coated as they are drawn to protect their inherent strength from handling abuse. In order to maintain high strength over the entire length of a fiber it is imperative that the coating be applied without damaging the fiber surface at any point. The coating must completely encapsulate the fiber and in the ideal case would concentrically surround it. A concentric coating is especially desirable for silicone-clad fibers1,2 in order to achieve low connector losses.

WT4 millimeter waveguide system: Waveguide design and fabrication

Abstract: The WT4 transmission line is a 60 mm diameter string of circular waveguide sections composed of 9 m long dielectric-lined and 44 m long helix waveguide sections, with dielectric-lined waveguide comprising approximately 99 percent of the transmission line The dielectric-lined waveguide is manufactured from steel tubing whose geometric distortions are controlled on a power spectral density basis The steel tubing is processed into waveguide by the application of copper and dielectric layers along its inner bore and by the attachment of flanges at its ends The materials system and processes were chosen for extremely low ohmic losses, minimum geometric distortions, and high long-term reliability The helix waveguide is formed from a closely spaced array of helically wound wires cast into an epoxy system, which is in turn enclosed in a steel jacket The key design features of this helix waveguide are (i) the specially prepared iron-loaded epoxy which provides ohmic dissipation to spurious mode energy and (ii) the precision temperature control applied to the curing of the epoxy to assure minimum geometry distortion

Thin-film beam splitter for integrated optics

Abstract: A simple thin-film beam splitter has been made by sputtering techniques. The device is similar in principle to beam splitters in bulk optics based on frustrated total reflection. It depends on a slow variation of guide thickness that permits the existence of an evanescent wave by which light is transferred from one side of the beam splitter to the other. The tunneling region has a variable index profile and there are no discontinuities. Fabrication techniques, theory, and experimental results are presented.

Fabrication of multilayer insulation films

Abstract: PURPOSE: To fabricate SiO 2 films of changing phosphorus concentrations to desired shapes by controlling the mixed solution of HF + NH 4 F + water to specified temperatures. COPYRIGHT: (C)1978,JPO&Japio

Critical Current and AC Loss of Coevaporated Nb3Sn Superconductors

Abstract: Stanford University has a program devoted to gaining an understanding of the material parameters of type II superconductors that are important for the achievement of high critical currents and minimum ac losses in the low magnetic fields encountered in superconducting power transmission lines. To that end, electron beam deposited Nb3Sn has been investigated. This method of fabrication is attractive because of the ease by which samples of differing grain size, thickness, and multiple components (layered samples) can be made. The present stage of this work has dealt mainly with tubular samples because this geometry is convenient for making induced critical current [1,2] and electronic ac loss measurements as described in more detail in a companion paper[3]. However, this configuration somewhat complicates the sample preparation process, as deposition is done on a heated, rotating tube, rather than a flat substrate. This paper provides observations on the film growth morphologies encountered in this process and relates them to the measured superconducting properties.

Method for fabrication of semiconductor device

Abstract: PURPOSE:To simplify the fabrication processes and to make polishing processes as scarce as possible in the method for fabrication of semiconductor device by the insulator-separation mode.