Showing papers on "RF power amplifier published in 2007"

Ultra-compact, low RF power, 10 Gb/s silicon Mach-Zehnder modulator.

Abstract: Silicon p(+)-i-n(+) diode Mach-Zehnder electrooptic modulators having an ultra-compact length of 100 to 200 mum are presented. These devices exhibit high modulation efficiency, with a V(pi)L figure of merit of 0.36 V-mm. Optical modulation at data rates up to 10 Gb/s is demonstrated with low RF power consumption of only 5 pJ/bit.

Feedback Analysis and Design of RF Power Links for Low-Power Bionic Systems

Abstract: This paper presents a feedback-loop technique for analyzing and designing RF power links for transcutaneous bionic systems, i.e., between an external RF coil and an internal RF coil implanted inside the body. The feedback techniques shed geometric insight into link design and minimize algebraic manipulations. We demonstrate that when the loop transmission of the link's feedback loop is -1, the link is critically coupled, i.e., the magnitude of the voltage transfer function across the link is maximal. We also derive an optimal loading condition that maximizes the energy efficiency of the link and use it as a basis for our link design. We present an example of a bionic implant system designed for load power consumptions in the 1-10-mW range, a low-power regime not significantly explored in prior designs. Such low power levels add to the challenge of link efficiency, because the overhead associated with switching losses in power amplifiers at the link input and with rectifiers at the link output significantly degrade link efficiency. We describe a novel integrated Class-E power amplifier design that uses a simple control strategy to minimize such losses. At 10-mW load power consumption, we measure overall link efficiencies of 74% and 54% at 1- and 10-mm coil separations, respectively, in good agreement with our theoretical predictions of the link's efficiency. At 1-mW load power consumption, we measure link efficiencies of 67% and 51% at 1- and 10-mm coil separations, respectively, also in good accord with our theoretical predictions. In both cases, the link's rectified output dc voltage varied by less than 16% over link distances that ranged from 2 to 10 mm

Wireless power transmission

Abstract: Disclosed is a system for power transmission. The system includes a receiver having a receiver antenna. An RF power transmitter includes a transmitter antenna. The RF power transmitter transmits RF power. The RF power includes multiple polarization components. The receiver converts the RF power to direct current. Also disclosed is an antenna for an RF power transmission system. The antenna includes at least two antenna elements. Alternating the radiation between the at least two antenna elements produces a power transmission having components in two polarizations. Additionally disclosed is a transmitter, a receiver and a method for power transmission.

Low-Power CMOS Rectifier Design for RFID Applications

Abstract: We investigate theoretical and practical aspects of the design of far-field RF power extraction systems consisting of antennas, impedance matching networks and rectifiers. Fundamental physical relationships that link the operating bandwidth and range are related to technology dependent quantities like threshold voltage and parasitic capacitances. This allows us to design efficient planar antennas, coupled resonator impedance matching networks and low-power rectifiers in standard CMOS technologies (0.5-mum and 0.18-mum) and accurately predict their performance. Experimental results from a prototype power extraction system that operates around 950 MHz and integrates these components together are presented. Our measured RF power-up threshold (in 0.18-mum, at 1 muW load) was 6 muWplusmn10%, closely matching the predicted value of 5.2 muW.

Designing Efficient Inductive Power Links for Implantable Devices

Abstract: Due to limited battery life and size limitations, many implantable biomedical devices must be powered inductively. Because of weak coupling between implanted and external coils, obtaining high power efficiency is a challenge. Previous authors have addressed the issue of optimizing power efficiency in these systems. In this paper, we further this analysis for the case of planar spiral "pancake" coils at low RF frequencies (100 kHz -10 MHz). We consider practical design constraints such as component variation, power amplifier limitations, and coil voltage limits. We introduce a new, complete expression for total power link efficiency.

Implementation of an RF power transmitter and network

Abstract: Disclosed is a power transmission system for wirelessly powering a power harvesting device. The system comprises at least one RF power transmitter. The system includes an AC power grid, or a DC grid to which the transmitter is electrically connected. Also disclosed is an adjustable RF power transmitter for powering wirelessly an RF power harvesting device. Also disclosed is a power transmission system for wirelessly powering an RF power harvesting device. The system can include a computer with an antenna or a lighting fixture or a light or a battery charging unit or a battery. Also disclosed is an apparatus for wirelessly powering a power harvesting device. Also disclosed is a method for wirelessly powering a power harvesting device.

Rf power transmission network and method

Abstract: Disclosed is an RF power transmission network (10). The network (10) includes at least one RF power transmitter (12a), at least one power tapping component (14a), and at least one load (20a). The at least one RP power transmitter (12a), the at least one power tapping component (14a), and the at least one load (20a) are connected in series. The RF power transmitter (12a) sends power through the network. The power is radiated from the network to be received by a device to be charged, recharged, or directly powered by the power.

Radio frequency power amplifier and method using a controlled supply

Abstract: A radio frequency power amplifier includes a feedback control system coupled to an input signal and a first feedback signal and configured to provide an output; a controlled supply configured to provide power that is controlled in accordance with a signal; and a radio frequency gain stage powered from the controlled supply, driven by the output from the feedback control system, and configured to provide an output signal at the radio frequency to a resonant load, where the first feedback signal corresponds to the output signal. Some embodiments include a sequencer in the feedback control system and others utilize an additional feedback loop to control the power provided by the controlled supply.

A Monolithic High-Efficiency 2.4-GHz 20-dBm SiGe BiCMOS Envelope-Tracking OFDM Power Amplifier

Abstract: A monolithic SiGe BiCMOS envelope-tracking power amplifier (PA) is demonstrated for 802.11g OFDM applications at 2.4 GHz. The 4-mm2 die includes a high-efficiency high-precision envelope amplifier and a two-stage SiGe HBT PA for RF amplification. Off-chip digital predistortion is employed to improve EVM performance. The two-stage amplifier exhibits 12-dB gain, <5% EVM, 20-dBm OFDM output power, and an overall efficiency (including the envelope amplifier) of 28%.

Transmit/receive switch

Abstract: A radio frequency (RF) transmit/receive switch. The transmit/receive switch comprises an impedance matching circuit and a voltage scaling circuit. The impedance matching circuit matches an incoming RF signal to a low noise amplifier and an outgoing RF signal from a power amplifier. The voltage scaling circuit, coupled to the impedance matching circuit, the power amplifier, and the low noise amplifier, attenuates the outgoing RF signal to a scaled signal within a breakdown voltage of a transistor device in the low noise amplifier during transmission of the outgoing RF signal.

Design of Class E Amplifier With Nonlinear and Linear Shunt Capacitances for Any Duty Cycle

Abstract: One of the main advantages of class E amplifiers for RF and microwave applications relies on the inclusion of a shunt capacitance in the tuned output network. At high frequencies, this capacitance is mainly provided by the output parasitic capacitance of the device with perhaps a linear external one for fine adjustments. The device's output capacitance is nonlinear and this influences the design parameters, frequency limit of operation, and performance of the class E amplifier. This paper presents a design method for the class E amplifier with shunt capacitance combining a nonlinear and linear one for any duty cycle, any capacitance's nonlinear dependence parameters, and any loaded quality factor of the tuned network. Nonlinear design with possibly different duty cycles is of relevance to maximize power or, alternatively, frequency utilization of a given device. Experimental, simulated, and compared results are presented to prove this design procedure

Linearization of a transmit amplifier

Abstract: A novel apparatus and method of linearization of a digitally controlled pre-power amplifier (DPA) and RF power amplifier (PA). The mechanism is operative to perform predistortion calibration to compensate for nonlinearities in the DPA and PA circuits. A predistortion look up table (LUT) stores measured distortion compensation data that is applied to the TX data before being input to the digital to frequency converter (DFC), DPA and PA. The mechanism of the invention takes advantage of the on-chip receiver, which is normally inactive during the TX burst in a half-duplex operation, to demodulate the RF PA output and use the digital I/Q RX outputs to perform calibration of the TX pre-distortion tables. Controlled RF coupling is used to provide a sample of the RF output signal that to the receiver chain. The contents of the predistortion LUT are typically updated during the PA power up or down ramp. While the digitally-controlled PA (DPA) code is increasing (or decreasing), the amplitude and phase of the recovered I/Q samples are used to determine the instantaneous value of the AM/AM and AM/PM pre-distortion from which an update to the predistortion tables may be computed.

RF power amplifier

Abstract: The RF power amplifier includes first and second amplifiers Q 1 and Q 2 as final-stage amplification power devices connected in parallel between an input terminal RF_In and an output terminal RF_Out. The amplifiers Q 1 and Q 2 are formed on one semiconductor chip. The first bias voltage Vg 1 of the amplifier Q 1 is set to be higher than the second bias voltage Vg 2 of the amplifier Q 2 so that the amplifier Q 1 is operational between Class B and AB, and Q 2 is operational in Class C. The first effective device size Wgq 1 of the amplifier Q 1 is intentionally set to be smaller than the second effective device size Wgq 2 of the amplifier Q 2 beyond a range of a manufacturing error of the semiconductor chip. An RF power amplifier that exhibits a high power-added efficiency characteristic regardless of whether the output power is High or Low can be materialized.

Switchmode RF power amplifiers

Abstract: A majority of people now have a digital mobile device whether it be a cell phone, laptop, or blackberry. Now that we have the mobility we want it to be more versatile and dependable; RF power amplifiers accomplish just that. These amplifiers take a small input and make it stronger and larger creating a wider area of use with a more robust signal.Switching mode RF amplifiers have been theoretically possible for decades, but were largely impractical because they distort analog signals until they are unrecognizable. However, distortion is not an issue with digital signals-like those used by WLANs and digital cell phones-and switching mode RF amplifiers have become a hot area of RF/wireless design. This book explores both the theory behind switching mode RF amplifiers and design techniques for them. *Provides essential design and implementation techniques for use in cma2000, WiMAX, and other digital mobile standards*Both authors have written several articles on the topic and are well known in the industry*Includes specific design equations to greatly simplify the design of switchmode amplifiers

A 65 μW, 1.9 GHz RF to digital baseband wakeup receiver for wireless sensor nodes

Abstract: A complete 1.9 GHz receiver, with BAW resonator-referenced input matching network, is designed as a wakeup receiver for wireless sensor networks. The 90 nm CMOS chip includes RF amplifier, PGA, ADC, and reference generation, while consuming 65 μW from a single 0.5 V supply. The input RF bandwidth of the receiver is 7 MHz, while the maximum data rate is 100 kbps. When detecting a 31-bit sequence, the receiver exhibits -56 dBm sensitivity for 90% probability of detection.

Chopper-stabilized instrumentation amplifier for impedance measurement

Abstract: This disclosure describes a chopper stabilized instrumentation amplifier. The amplifier is configured to achieve stable measurements at low frequency with very low power consumption. The instrumentation amplifier uses a differential architecture and a mixer amplifier to substantially eliminate noise and offset from an output signal produced by the amplifier. Dynamic limitations, i.e., glitching, that result from chopper stabilization at low power are substantially eliminated through a combination of chopping at low impedance nodes within the mixer amplifier and feedback. The signal path of the amplifier operates as a continuous time system, providing minimal aliasing of noise or external signals entering the signal pathway at the chop frequency or its harmonics. The amplifier can be used in a low power system, such as an implantable medical device, to provide a stable, low-noise output signal.

A High-Frequency Resonant Inverter Topology with Low Voltage Stress

Abstract: This document presents a new switched-mode resonant inverter, which we term the Phi2 inverter, that is well suited to operation at very high frequencies and to rapid on/off control. Features of this inverter topology include low semiconductor voltage stress, small passive energy storage requirements, fast dynamic response, and good design flexibility. The structure and operation of the proposed topology are described, and a design procedure is introduced. Experimental results demonstrating the new topology are also presented. A prototype Phi2 inverter is described that switches at 30 MHz and provides over 500 W of rf power at a drain efficiency above 92%. It is expected that the Phi2 inverter will find use as a building block in high performance dc-dc converters among other applications [1], [2].

Analytical Design Equations for Class-E Power Amplifiers with Finite DC-Feed Inductance and Switch On-Resistance

Abstract: Many critical design trade-offs of the class-E power amplifier (e.g power efficiency) are influenced by the switch on-resistance and the value of dc-feed drain inductance. In literature, the time-domain mathematical analyses of the class-E power amplifier with finite dc-feed inductance assume zero switch on-resistance in order to alleviate the mathematical difficulties; resulting in non-optimum designs. We present analytical design equations in this paper for class-E power amplifier taking into account both finite drain inductance and switch on-resistance. The analysis indicates the existence of infinitely many design equations; conclusions include: 1) class-E conditions (e.g. zero voltage and zero slope) can be satisfied in the presence of switch-on resistance. 2) The drain-efficiency (eta) of the class-E power amplifier is upper limited for a certain operation frequency and transistor technology. 3) Using a finite dc-feed inductance instead of an RF-choke in a class-E power amplifier can increase eta by ap 30%.

Responsivity and Noise Measurements of Zero-Bias Schottky Diode Detectors

Abstract: Schottky barrier diodes can be used as direct detectors throughout the millimeterand submillimeterwave bands. When the diodes are optimized to have a low forward turn-on voltage, the detectors can achieve excellent frequency response and bandwidth, even with zero-bias. This paper reports on the characterization of VDI’s zerobias Schottky detectors. Responsivity typically ranges from 4,000 V/W at 100 GHz to 400 V/W at 900 GHz and each detector achieves good responsivity across the entire singlemoded bandwidth of the input rectangular waveguide. Under low power operation the detectors achieve a measured noise-equivalent-power (NEP) of about 1.5x10 W/√Hz, even without signal modulation. Such high sensitivity is expected for any zero-bias diode detector with high responsivity when there is no incident RF power; since only thermal noise can be generated under this condition. However, as the input power is increased, excess noise is generated. This noise typically has a 1/f power spectrum and is commonly known as flicker noise. Flicker noise becomes increasingly important as the input power is increased and signal modulation is generally required to achieve maximum sensitivity. The signal-to-noise of the VDI zero-bias detectors has been carefully measured as a function of input power and modulation rate. This data allows the user to understand the sensitivity of the detector under real operating conditions, and is therefore far more useful than the simple measurement of detector NEP with zero RF power, which is commonly quoted in the literature for new diode detector designs. Index Terms — Terahertz detectors, zero-bias detectors, noise-equivalent power, flicker noise.

Design of H-Bridge Class-D Power Amplifiers for Digital Pulse Modulation Transmitters

Abstract: This paper presents an H-bridge class-D power amplifier (PA) for digital pulse modulation transmitters. The class-D amplifier can be driven by two-or three-level digital signals generated by a delta-sigma modulator (DSM) and provides a linear microwave output after filtering. Within the amplifier, the pull-up and pull-down devices are driven separately to improve the amplifier efficiency by minimizing the loss associated with shoot-through current. The H-bridge class-D PA system was tested with code-division multiple-access IS-95 signals at 800 MHz. Using binary DSM signals, a drain efficiency of 31% was achieved with an output power of 15 dBm and an adjacent channel power ratio of -43 dBc. With three-level DSM signals, a drain efficiency of 33% was achieved at same output power. An analysis of the factors governing amplifier efficiency is provided.

A $\Delta\Sigma$ -Digitized Polar RF Transmitter

Abstract: This paper demonstrates a new polar transmitter architecture, which uses the digitized envelope signal to control the drain voltage of a switching mode power amplifier (PA). It is based on a novel polar modulation using the constant envelope modulated signal. Among the various constant envelope modulators, the DeltaSigma modulator is chosen for its noise-shaping characteristic. It enables the use of a highly efficient switching amplifier with high linearity. For demonstration, the overall transmitter is implemented and tested with a code-division multiple-access IS-95A signal. The class-D and class-F amplifiers are designed and compared for the optimum operation. The experimental results show that the amplifier with small device size is suitable for this application because of the fast switching requirement. For the class-F amplifier, the measured power-added efficiency is 51.7% at 22.1 dBm and the overall efficiency (considering the amplified quantization noise) is 31%. The adjacent channel power ratios at 885 kHz and 1.98 MHz are lower than -44.9 and -55.6 dBc at the output power range from 10.8 to 22.1 dBm without any pre-distortion techniques. The overall efficiency is improved to 48.6% with a three-level quantized DeltaSigma modulator. The results clearly show that the highly efficient switching mode PA can be controlled efficiently using a digital signal from the DeltaSigma envelope modulation technique.

A Transmitter Architecture Based on Delta–Sigma Modulation and Switch-Mode Power Amplification

Abstract: This brief presents a method of deploying RF switch-mode power amplification for varying envelope signals. Thereby the power amplifier can be operated as a switch with a high power efficiency as the result. The key idea is to transmit either a full RF period or none at all in such a way that the correct modulated RF signal is obtained after filtering. This is accomplished in a novel configuration of a low-pass DeltaSigma modulator using a phase modulated clock combined with a simple AND-gate. The designed modulator is easy to implement, displays very good linearity and offers time domain signals that promote the power efficiency of the power amplifier. The working principle is described through theory and simulations, and validation is done via measurements on a prototype of the modulator. Measurements on the prototype show that the presented modulator modulates a UMTS signal with more than 10-dB margin to the spectrum mask and EVM below 0.85% RMS (req<17.5%). Delta-sigma, power amplifier (PA), RF, switch mode, transmitter architecture, varying envelope.

Rf transmitter with variably biased rf power amplifer and method therefor

Abstract: An RF transmitter (30) includes an RF power amplifier (32) for which the power input bias voltage (40) and signal input bias voltage (80) are controlled within feedback loops. A peak detector (44) generates a lowered-spectrum, peak-tracking signal (34) that follows the largest amplitude peaks of a wide bandwidth communication signal (16) but exhibits a lower bandwidth. This signal (34) is scaled in response to the operation of a drain bias tracking loop (146) then used to control a switching power supply (36) that generates the power input bias voltage. The tracking loop (146) is responsive to out-of-band power detected in a portion of the amplified RF communication signal (16'). A ratio of out-of-band power (128) to in-band power (126) is manipulated in the tracking loop (146) so that the power input bias voltage is modulated in a way that holds the out-of-band power at a desired predetermined level.

Linearization of CMOS Broadband Power Amplifiers Through Combined Multigated Transistors and Capacitance Compensation

Abstract: We present the development of a device-level linearization technique and its applications in broadband power amplifiers (PAs). The proposed topology firstly combines derivative transconductance superposition method and gate capacitance compensation technique, and creates a "sweet region" for suppressing third-order intermodulation (IM3) without the penalty of large power consumption. The effectiveness of the proposed technique has been demonstrated through a fully integrated distributed amplifier. The experimental results in 0.18-mum RF CMOS technology show that IM3 is improved by 11 dB. The achievable power-added efficiency is up to 25%, which is the highest among the broadband CMOS PAs reported thus far. The amplifier achieves a measured 3-dB bandwidth of 3.7-8.8 GHz, and a gain of 8.24 dB. The amplifier only consumes 154-mW dc power, and the measured saturation power (Psat) is 19 dBm.

A 2 W CMOS Hybrid Switching Amplitude Modulator for EDGE Polar Transmitters

Abstract: This paper presents a hybrid switching amplitude modulator for class-E2 EDGE polar transmitters. To achieve both high efficiency and high speed, it consists of a wideband buffered linear amplifier as a voltage source and a PWM switching amplifier with a 2 MHz switching frequency as a dependent current source. The linear amplifier with a novel class-AB topology has a high current-driving capability of approximately 300 mA with a bandwidth wider than 10 MHz. It can also operate on four quadrants with very low output impedance of about 200 at the switching frequency attenuating the output ripple voltage to less than 12 . A feedforward path, a PWM control, and a third-order ripple filter are used to reduce the current burden of the linear amplifier. The output voltage of the hybrid modulator ranges from 0.4 to 3 V for a 3.5 V supply. It can drive an RF power amplifier with an equivalent impedance of 4 up to a maximum output power of 2.25 W with a maximum efficiency of 88.3%. The chip has been fabricated in a 0.35 m CMOS process and occupies an area of 4.7 .

Controlling switching mode power supply of power amplifier

Abstract: A radio frequency transceiver is provided. The transceiver comprises a receiver for receiving transmission at a first radio frequency and a transmitter for transmitting at a second radio frequency, and in the transmitter a power amplifier (100) with a switching mode power supply (108). The transceiver further comprises a controller (406) configured to vary the switching frequency of the switching mode power supply on the basis of the frequency separation of the first and the second radio frequencies.

Systems and Methods of RF Power Transmission, Modulation, and Amplification

Abstract: An apparatus, system, and method are provided for energy conversion. For example, the apparatus can include a trans-impedance node, a reactive element, and a trans-impedance circuit. The reactive element can be configured to transfer energy to the trans-impedance node. The trans-impedance circuit can be configured to receive one or more control signals and to dynamically adjust an impedance of the trans-impedance node. The trans-impedance node, as a result, can operate as an RF power switching supply based on the one or more control signals.

Circuit and method for RF power amplifier power regulation and modulation envelope tracking

Abstract: A power amplifier receives an input signal and generates an amplified output signal. A switching converter generates a regulated voltage and performs power control for the power amplifier. A linear amplifier performs modulation envelope control for the power amplifier. The switching converter may be coupled in series with the linear amplifier, and this circuit may operate in one of multiple modes. For example, the linear amplifier may output a tracked voltage to the power amplifier in GSM/polar EDGE mode, and the switching converter may output the regulated voltage to the power amplifier in WCDMA/UMTS mode. The linear amplifier could also output the tracked voltage in both modes, and a selector could select the appropriate feedback voltage for the switcher. The switching converter could also provide the regulated voltage directly to the power amplifier, and the linear converter could adjust a bias of the power amplifier to provide envelope tracking.

A High-Efficiency Class-E GaN HEMT Power Amplifier for WCDMA Applications

Abstract: This letter reports a high efficiency class-E power amplifier using a GaN high electron mobility transistor (HEMT), which is designed at WCDMA band of 2.14 GHz. To improve output power and efficiency by suppressing harmonic powers, an output network using transmission lines is used. For a single tone, the proposed output network suppresses all harmonic power levels below -60 dBc for the whole output power range. The peak power-added efficiency (PAE) of 70% with a power gain of 13 dB is achieved at an output power of 43 d Bin. The broadband performance with a power gain over 12 dB and PAE over 60% is maintained through 200 MHz.