Showing papers by "Ali Javey published in 2010"

Nanowire active-matrix circuitry for low-voltage macroscale artificial skin

Abstract: Large-scale integration of high-performance electronic components on mechanically flexible substrates may enable new applications in electronics, sensing and energy. Over the past several years, tremendous progress in the printing and transfer of single-crystalline, inorganic micro- and nanostructures on plastic substrates has been achieved through various process schemes. For instance, contact printing of parallel arrays of semiconductor nanowires (NWs) has been explored as a versatile route to enable fabrication of high-performance, bendable transistors and sensors. However, truly macroscale integration of ordered NW circuitry has not yet been demonstrated, with the largest-scale active systems being of the order of 1 cm(2) (refs 11,15). This limitation is in part due to assembly- and processing-related obstacles, although larger-scale integration has been demonstrated for randomly oriented NWs (ref. 16). Driven by this challenge, here we demonstrate macroscale (7×7 cm(2)) integration of parallel NW arrays as the active-matrix backplane of a flexible pressure-sensor array (18×19 pixels). The integrated sensor array effectively functions as an artificial electronic skin, capable of monitoring applied pressure profiles with high spatial resolution. The active-matrix circuitry operates at a low operating voltage of less than 5 V and exhibits superb mechanical robustness and reliability, without performance degradation on bending to small radii of curvature (2.5 mm) for over 2,000 bending cycles. This work presents the largest integration of ordered NW-array active components, and demonstrates a model platform for future integration of nanomaterials for practical applications.

Ultrathin compound semiconductor on insulator layers for high-performance nanoscale transistors

Abstract: Compound semiconductor materials such as gallium arsenide and indium arsenide have outstanding electronic properties, but are costly to process and cannot, on their own, compete with silicon when it comes to low-cost fabrication. But as the relentless miniaturization of silicon electronics is reaching its limits, an alternative route of enhanced device performance is becoming more attractive: the integration of compound semiconductors within silicon. Ali Javey and colleagues now present a promising new concept to integrate ultrathin layers of single-crystal indium arsenide on silicon-based substrates with an epitaxial transfer method, a technique borrowed from large-area optoelectronics. With this technique, involving the use of an elastomeric stamp to lift off indium arsenide nanowires and transfer them to a silicon-based substrate, the authors fabricate thin film transistors with excellent device performance. A potential route to enhancing the performance of electronic devices is to integrate compound semiconductors, which have superior electronic properties, within silicon, which is cheap to process. These authors present a promising new concept to integrate ultrathin layers of single-crystal indium arsenide on silicon-based substrates with an epitaxial transfer method borrowed from large-area optoelectronics. With this technique, the authors fabricate thin-film transistors with excellent device performance. Over the past several years, the inherent scaling limitations of silicon (Si) electron devices have fuelled the exploration of alternative semiconductors, with high carrier mobility, to further enhance device performance1,2,3,4,5,6,7,8. In particular, compound semiconductors heterogeneously integrated on Si substrates have been actively studied7,9,10: such devices combine the high mobility of III–V semiconductors and the well established, low-cost processing of Si technology. This integration, however, presents significant challenges. Conventionally, heteroepitaxial growth of complex multilayers on Si has been explored9,11,12,13—but besides complexity, high defect densities and junction leakage currents present limitations in this approach. Motivated by this challenge, here we use an epitaxial transfer method for the integration of ultrathin layers of single-crystal InAs on Si/SiO2 substrates. As a parallel with silicon-on-insulator (SOI) technology14, we use ‘XOI’ to represent our compound semiconductor-on-insulator platform. Through experiments and simulation, the electrical properties of InAs XOI transistors are explored, elucidating the critical role of quantum confinement in the transport properties of ultrathin XOI layers. Importantly, a high-quality InAs/dielectric interface is obtained by the use of a novel thermally grown interfacial InAsO x layer (~1 nm thick). The fabricated field-effect transistors exhibit a peak transconductance of ~1.6 mS µm−1 at a drain–source voltage of 0.5 V, with an on/off current ratio of greater than 10,000.

Ordered arrays of dual-diameter nanopillars for maximized optical absorption.

Abstract: Optical properties of highly ordered Ge nanopillar arrays are tuned through shape and geometry control to achieve the optimal absorption efficiency. Increasing the Ge materials filling ratio is shown to increase the reflectance while simultaneously decreasing the transmittance, with the absorbance showing a strong diameter dependency. To enhance the broad band optical absorption efficiency, a novel dual-diameter nanopillar structure is presented, with a small diameter tip for minimal reflectance and a large diameter base for maximal effective absorption coefficient. The enabled single-crystalline absorber material with a thickness of only 2 μm exhibits an impressive absorbance of ∼99% over wavelengths, λ = 300−900 nm. These results enable a viable and convenient route toward shape-controlled nanopillar-based high-performance photonic devices.

Metal-catalyzed crystallization of amorphous carbon to graphene

Abstract: Metal-catalyzed crystallization of amorphous carbon to graphene by thermal annealing is demonstrated. In this “limited source” process scheme, the thickness of the precipitated graphene is directly controlled by the thickness of the initial amorphous carbon layer. This is in contrast to chemical vapor deposition processes, where the carbon source is virtually unlimited and controlling the number of graphene layers depends on the tight control over a number of deposition parameters. Based on the Raman analysis, the quality of graphene is comparable to other synthesis methods found in the literature, such as chemical vapor deposition. The ability to synthesize graphene sheets with tunable thickness over large areas presents an important progress toward their eventual integration for various technological applications.

Palladium/silicon nanowire Schottky barrier-based hydrogen sensors

Abstract: This work presents the design, fabrication, and characterization of a hydrogen sensor based on a palladium/nanowire Schottky barrier field-effect transistor that operates at room temperature. The fabricated sensor consists of boron-doped silicon nanowire arrays that are contact printed on top of a SiO2/Si substrate with subsequently evaporated Pd contacts. The fabrication process is compatible with post-CMOS and plastic substrate integration as it can be completed at temperatures below 150 ◦ C with good yield and repeatability. The sensor can reliably and reversibly detect H2 concentrations in the range from 3 ppm to 5% and has a sensitivity of 6.9%/ppm at 1000 ppm. A response distinguishable from drift and noise is produced in less than 5 s for H2 concentrations over 1000 ppm and less than 30 s for concentrations over 100 ppm. The sensor settles to 90% of the final signal value in about 1 h at lower concentrations and less than 1 min at 10,000 ppm H2. Drift over an 87-h measurement period is below 5 ppm H2 concentration. © 2009 Elsevier B.V. All rights reserved.

Parallel Array InAs Nanowire Transistors for Mechanically Bendable, Ultrahigh Frequency Electronics

Abstract: The radio frequency response of InAs nanowire array transistors on mechanically flexible substrates is characterized. For the first time, GHz device operation of nanowire arrays is demonstrated, despite the relatively long channel lengths of ∼1.5 μm used in this work. Specifically, the transistors exhibit an impressive maximum frequency of oscillation, f(max) ∼ 1.8 GHz, and a cutoff frequency, f(t) ∼ 1 GHz. The high-frequency response of the devices is due to the high saturation velocity of electrons in high-mobility InAs nanowires. The work presents a new platform for flexible, ultrahigh frequency devices with potential applications in high-performance digital and analog circuitry.

Prospect of tunneling green transistor for 0.1V CMOS

Abstract: Well designed tunneling green transistor may enable future VLSIs operating at 0.1V. Sub-60mV/decade characteristics have been convincingly demonstrated on 8″ wafers. Large I ON at low V DD are possible according to TCAD simulations but awaits verification. V DD scaling will greatly benefit from low (effective) band gap energy, which may be provided by type II heterojunctions of Si/Ge or compound semiconductors.

Design constraints and guidelines for CdS/CdTe nanopillar based photovoltaics

Abstract: The performance dependence of a CdS/CdTe nanopillar solar cell on various device and materials parameters is explored while examining its performance limits through detailed device modeling. The optimized cell enables efficiencies >∼20% with minimal short circuit current dependence on bulk minority carrier diffusion length, demonstrating the efficient collection of photogenerated carriers, therefore, lowering the materials quality and purity constraints. Given the large p-n junction interface area, the interface recombination velocity is shown to have detrimental effect on the device performance of nanopillar solar cells. In that regard, the CdS/CdTe material system is optimal due to its low interface recombination velocity.

Black GE based on crystalline/amorphous core/shell nanoneedle arrays

Abstract: Direct growth of black Ge on low-temperature substrates, including plastics and rubber is reported. The material is based on highly dense, crystalline/amorphous core/shell Ge nanoneedle arrays with ultrasharp tips (˜4 nm) enabled by the Ni catalyzed vapor-solid-solid growth process. Ge nanoneedle arrays exhibit remarkable optical properties. Specifically, minimal optical reflectance (<1%) is observed, even for high angles of incidence (˜75°) and for relatively short nanoneedle lengths (˜1 μm). Furthermore, the material exhibits high optical absorption efficiency with an effective band gap of ˜1 eV. The reported black Ge can have important practical implications for efficient photovoltaic and photodetector applications on nonconventional substrates.

Flexible Carbon‐Nanofiber Connectors with Anisotropic Adhesion Properties

Abstract: The ability of gecko lizards and many insects to climb vertical surfaces relies on the hierarchical micro- and nanofibrillar arrayed features on their feet. [1‐3] The fibrillar structures provide conformal contact with the opposing surfaces to maximize the van der Waals (vdW) interactions. [4] These adhesive systems found in nature have inspired researchers to design synthetic adhesives by using fibrillar arrays of polymers andcarbonnanotubes(CNTs),whichcanuniversallyattachtoa variety of surfaces. [5‐10] In addition to these universal adhesives, the fibrillar arrays have also been utilized to design self-selective connectors to bind morphologically self-similar components together. Specifically, we recently reported selfselective connectors based on inorganic/organic nanowire (NW) arrays, in which the vdW interactions are significantly amplified by the interpenetration of the high-aspect-ratio NW components. [11‐13] In contrast to gecko adhesives, the unisex NW connectors feature self-selective binding with weak adhesiontonon-self-similarsurfacesarisingfromtherelatively stiff structure ofthe hybrid NWs. While thepotency ofthe NW connectors has been shown, previous studies have relied on hard and fragile backing layers, such as silicon substrates used for the growth of the inorganic NWs, which is not practical for applications requiring lightweight, robust, and bendable backing layers. Herein, we introduce bendable carbon nanofiber (CNF) connectors with mechanically flexible backing and excellent self-selective adhesion properties. CNFs are similar to multiwalled (MW) CNTs but are distinguished by their stacked graphitic, conelike structures, and are often tapered. [14] This structure allows individual CNFs to be free-standing and more effective as interpenetrating connectors than similarly grown CNT forests, which suffer from significant entanglement. The flexible CNF connectors are enabled by the direct transfer of vertical CNF arrays (i.e., CNF forests) grown on silicon substrates to plastic substrates. The vertical geometry of the CNF arrays provides strong shear adhesion strength due to the efficient interpenetration of the CNFs with minimal engagement and disengagement forces. Furthermore, by controlling the tilt angle of the CNF arrays, directional shear adhesion properties are enabled.

Patterned p-doping of InAs nanowires by gas-phase surface diffusion of Zn.

Abstract: Gas phase p-doping of InAs nanowires with Zn atoms is demonstrated as an effective route for enabling postgrowth dopant profiling of nanostructures. The versatility of the approach is demonstrated by the fabrication of high-performance gated diodes and p-MOSFETs. High Zn concentrations with electrically active content of ∼1 × 1019 cm−3 are achieved which is essential for compensating the electron-rich surface layers of InAs to enable heavily p-doped structures. This work could have important practical implications for the fabrication of planar and nonplanar devices based on InAs and other III−V nanostructures which are not compatible with conventional ion implantation processes that often cause severe lattice damage with local stoichiometry imbalance.

Thermoresponsive chemical connectors based on hybrid nanowire forests.

Abstract: Microand nanostructured surfaces found in biological systems have inspired the fabrication of functional materials with unique optical, chemical, and mechanical properties. Inspired by the nanofibrillar structures of gecko adhesives, we recently reported self-selective, chemical connectors (i.e., fasteners) based on interpenetrating nanowire (NW) forests, which primarily use the highly tunable van der Waals (vdW) interactions to enable efficient binding of components at both macroand microscales. Of particular interest to certain practical applications are programmable fasteners that can change their adhesion properties on command, for example, in response to external stimuli. In this regard, herein, we report programmable NW fasteners that reversibly change their wet adhesion strength in response to a thermal change of the environment. The thermoresponsive NW fasteners are based on core/multishell hybrid NW forests with an outer shell of poly(N-isopropylacrylamide) (PNIPAM). PNIPAM is a thermoresponsive hydrogel with a lower critical solution temperature (LCST) of approximately 32 8C in water. Specifically, at room temperature, PNIPAM absorbs water, resulting in the swelling of the polymer and hydrophilic surface properties. However, PNIPAM shrinks at temperatures higher than the LCSTand transforms to a hydrophobic state. We utilized this well known property of PNIPAM in conjunction with high aspect ratio nanofibrillar structures to enable programmable fasteners with tunable properties. The fabrication procedure for the thermoresponsive NW fasteners is outlined in Figure 1a. First, Ge/parylene core/ shell NW forests were prepared by growing Ge NW forests

Shape-Controlled Synthesis of Single-Crystalline Nanopillar Arrays by Template-Assisted Vapor−Liquid−Solid Process

Abstract: Highly regular, single-crystalline nanopillar arrays with tunable shapes and geometry are synthesized by the template-assisted vapor−liquid−solid growth mechanism. In this approach, the grown nanopillars faithfully reproduce the shape of the pores because during the growth the liquid catalyst seeds fill the space available, thereby conforming to the pore geometry. The process is highly generic for various material systems, and as an example, CdS and Ge nanopillar arrays with square, rectangular, and circular cross sections are demonstrated. In the future, this technique can be used to engineer the intrinsic properties of NPLs as a function of three independently controlled dimensional parameters - length, width and height.

Hierarchical polymer micropillar arrays decorated with ZnO nanowires

Abstract: We introduce a simple and robust method for fabricating hierarchical fibrillar arrays based on polymer micropillar (μPLR) arrays decorated with ZnO nanowires (NWs) on mechanically flexible substrates. The hierarchical fibrillar arrays are fabricated by replica molding of polymer μPLR arrays on microfabricated silicon templates and subsequent solution-based growth of ZnO NWs. Fine control over the dimensions and aspect ratios of both the microelements and the nanoelements is demonstrated. The hierarchical μPLR/NW arrays show superhydrophobic surface properties, with the contact angle higher than that of planar surfaces and μPLR arrays without nanostructures. The fabrication strategy suggested here may be potentially extended to fabricate other organic/inorganic hierarchical systems for different applications.

Nanoscale Structural Engineering via Phase Segregation: Au-Ge System

Abstract: A tunable structural engineering of nanowires based on template-assisted alloying and phase segregation processes is demonstrated. The Au−Ge system, which has a low eutectic temperature and negligible solid solubility (<10−3 atom %) of Au in Ge at low temperatures, is utilized. Depending on the Au concentration of the initial nanowires, final structures ranging from nearly periodic nanodisk patterns to core/shell and fully alloyed nanowires are produced. The formation mechanisms are discussed in detail and characterized by in situ transmission electron microscopy and energy-dispersive spectrometry analyses. Electrical measurements illustrate the metallic and semiconducting characteristics of the fully alloyed and alternating Au/Ge nanodisk structures, respectively.

Graphitic interfacial layer to carbon nanotube for low electrical contact resistance

Abstract: Graphitic interfacial layer is used to wet the surface of carbon nanotube and dramatically lower the contact resistance of metal to metallic single-wall carbon nanotube (m-CNT). Using Ni-catalyzed graphitization of amorphous carbon (a-C), the average resistance of metal/m-CNT is reduced by 7X compared to the same contact without the graphitic layer. Small-signal conductance measurements from 77K to 300K reveal the effective contact improvement.

Resistive switching of carbon-based RRAM with CNT electrodes for ultra-dense memory

Abstract: We demonstrate the nonvolatile resistive switching of an amorphous carbon (a-C) layer with carbon nanotube (CNT) electrodes for ultra-dense memory. The use of CNT as electrode leads to the ultimately scaled cross-point area (∼1 nm2), and the use of a-C results in an all-carbon memory. Carbon-based complementary resistive switching (CRS) is shown for the first time, enabling cross-point memory without cell selection devices.

Nanostructure, photovoltaic device, and method of fabrication thereof

Abstract: An embodiment of nanostructure includes a conductive substrate; an insulating layer on the conductive substrate, metal nanoparticles, and elongated single crystal nanostructures. The insulating layer includes an array of pore channels. The metal nanoparticles are located at bottoms of the pore channels. The elongated single crystal nanostructures contact the metal nanoparticles and extend out of the pore channels. An embodiment of a photovoltaic device includes the nanostructure and a photoabsorption layer. An embodiment of a method of fabricating a nanostructure includes forming an insulating layer on a conductive substrate. The insulating layer has pore channels arranged in an array. Metal nanoparticles are formed in the pore channels. The metal nanoparticles conductively couple to the conductive layer. Elongated single crystal nanostructures are formed in the pore channels. A portion of the insulating layer is etched away, which leaves the elongated single crystal nanostructures extending out of the insulating layer.

Surface and gas phase doping of III-V semiconductors

Abstract: Compound semiconductor devices and methods of doping compound semiconductors are provided. Embodiments of the invention provide post-deposition (or post-growth) doping of compound semiconductors, enabling nanoscale compound semiconductor devices including diodes and transistors. In one method, a self-limiting monolayer technique with an annealing step is used to form shallow junctions. By forming a sulfur monolayer on a surface of an InAs substrate and performing a thermal annealing to drive the sulfur into the InAs substrate, n-type doping for InAs-based devices can be achieved. The monolayer can be formed by surface chemistry reactions or a gas phase deposition of the dopant. In another method, a gas-phase technique with surface diffusion is used to form doped regions. By performing gas-phase surface diffusion of Zn into InAs, p-type doping for InAs-based devices can be achieved. Both bulk and nanowire devices using compound semiconductors can be fabricated using these surface and gas-phase doping processes.

7.3: Development of a compact neutron source based on field ionization processes

Abstract: We report on the use of nano-emitters, for example carbon nano-tubes(CNTs), to ionize deuterium atoms and the creation of neutrons in a deuterium-deuterium reaction in a pre-loaded target. Acceleration voltages in the range of 50–80kV are used and the creation of positive and negative deuterium ions is investigated. We discuss optimization of emitters and show preliminary data of first neutron production.

Nanowire-based 2-D and 3-D XoY electronics

Abstract: The ability to deposit single crystalline materials on any substrate holds much promise for the fabrication of high-performance, low-cost flexible devices. This approach is called X-on-Y (XoY), where X stands for an arbitrary semiconductor and Y stands for an arbitrary substrate. To this end, we have multiple techniques for deposition of nanomaterials on arbitrary substrates. These techniques can be divided into two categories: three dimensional growth/assembly techniques [1–3] and two dimensional assembly techniques [4–8]. For fabrication of 3-D structures, we use a templated nanomaterial growth technique. Specifically, we use anodic aluminum oxide (AAO) as the growth template. This allows us to control the size of the individual nanostructures as well as the spacing between adjacent nanostructures, as shown in Fig. 1. Alternatively, for 2-D assembly, we use a nanomaterial transfer process, where the nanostructures are first grown on a convenient growth substrate, and then deterministically placed on a substrate of choice using photolithography in conjunction with a printing process (Fig. 2). Here, we discuss the 3-D and 2-D assembly techniques, utilizing specific examples to illustrate the potential of these methods for the fabrication of high performance devices on arbitrary substrates.