There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

다중혈관 관상동맥 환자에서 y-문합을 이용하여 양쪽 내흉동맥만을 사용한 우회술의 조기 성적

Leu-M

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

Zinc-ion batteries built on water-based electrolytes featuring compelling price-points, competitive performance, and enhanced safety represent advanced energy storage chemistry as a promising alternative to current lithium-ion battery systems. Attempts to develop rechargeable aqueous zinc-ion batteries (ZIBs) can be traced to as early as the 1980s; however, since 2015, the research activity in this field has surged throughout the world. Despite the achievements made in exploring electrode materials so far, significant challenges remain at the material level and even on the whole aqueous ZIBs system, leading to the failure of ZIBs to meet commercial requirements. This review aims to discuss how to pave the way for developing aqueous ZIBs. The current research efforts related to aqueous ZIBs electrode materials and electrolytes are summarized, including an analysis of the problems encountered in both cathode/anode materials and electrolyte optimization. Some concerns and feasible solutions for achieving practical aqueous ZIBs are discussed in detail. We would like to point out that merely improving the electrode materials is not enough; synergistic optimization strategies toward the whole battery system are also deeply needed. Finally, some perspectives are provided on the subsequent optimization design for further research efforts in the aqueous ZIB field.

Issues and opportunities facing aqueous zinc-ion batteries

By applying a novel active layer of titanium zinc oxide (TiZO), we have successfully fabricated fully transparent thin-film transistors (TFTs) with a bottom gate structure fabricated on a flexible plastic substrate at low temperatures. The effects of various oxygen partial pressures during channel deposition were studied to improve the device performance. We found that the oxygen partial pressure during channel deposition has a significant impact on the performance of TiZO TFTs, and that the TFT developed under 10% oxygen partial pressure exhibits superior performance with a low threshold voltage (V th) of 2.37 V, a high saturation mobility (μsat) of 125.4 cm2 V−1 s−1, a steep subthreshold swing (SS) of 195 mV/decade and a high I on/I off ratio of 3.05 × 108. These results suggest that TiZO thin films are promising for high-performance fully transparent flexible TFTs and displays.

https://iopscience.iop.org/article/10.7567/JJAP.55.04EK06/pdf

Effects of various oxygen partial pressures on Ti-doped ZnO thin film transistors fabricated on flexible plastic substrate

In this paper, a low-cost sub-50 nm poly-Si gate patterning technology is proposed and experimentally demonstrated The technology is optical resolution-independent, that is, it does not contain any critical photolithographic step. The masking layer for gate formation is from the pattern transfer of edge-defined spacer. Experimental results reveal that the resultant gate length is determined by the thickness of the film forming the spacer, and is about 75 to 85 percent of the deposited film thickness. SEM photographs show the cross-section of the poly Si gate fabricated using the proposed technology is an inverted-trapezoid, which can be utilized to reduce the gate resistance for transistor with the same gate length.

A novel sub-50 nm poly-Si gate patterning technology

In this paper, we demonstrated a 15-inch AMOLED display with the application of top-gate typed thin-film-transistors (TFTs). Particularly, the display was derived by gate driver on array circuit (GOA) with a panel resolution of HD (540×960). When the display was tape out, the I-V curves of TFTs were characterized by a Keithley-4200 equipment. Moreover, a jig and oscilloscope were utilized to testify the function of the GOA circuit. At last, this display was derived by GOA and a photograph of the display was shown.

The design of a 15-inch AMOLED display derived by GOA

The advantages of using elevated S/D formed on oxide shallow trench isolation are studied in detail. By careful design, the short channel short channel effects can be suppressed by the elevated source/drain (S/D) structure. In addition, the S/D region parasitic capacitance is significantly suppressed by the silicon-on-insulator (SOI)-like S/D structure. Tradeoff between series resistance and gate-to-drain Miller capacitance can be achieved by carefully selecting the gate spacer thickness. With careful optimization of device geometry, both the gate-delay and power consumption can be significantly reduced together. Design guideline and potential performance gain with the S/D-on-insulator structure is discussed.

Analysis and optimization of SDOI structure to maximize the intrinsic performance of extremely scaled MOSFETs

A photoelectric sensor and a display panel comprise: a pulse transmission unit comprising a control node, after obtaining a driving voltage, the control node of the pulse transmission unit transmitting first clock signals to a signal output terminal; a pulse control unit configured to receive scanning signals from a signal input terminal and charging the control node of the pulse transmission unit so as to provide the driving voltage; and photoelectric sensing unit configured to provide a leakage current in response to the intensity of external illumination when receiving the external illumination, the leakage current discharging the control node of the pulse transmission unit, so that the voltage at the control node of the pulse transmission unit is less than the driving voltage after a period of time. The circuit of the photoelectric sensor utilizes the existing scanning signals and clock signals of a conventional display panel, with no need for an extra control signal, and therefore the circuit is simple in structure, and more suitable for being integrated on the display panel.

Shengdong Zhang

Papers

Effects of various oxygen partial pressures on Ti-doped ZnO thin film transistors fabricated on flexible plastic substrate

A novel sub-50 nm poly-Si gate patterning technology

The design of a 15-inch AMOLED display derived by GOA

Analysis and optimization of SDOI structure to maximize the intrinsic performance of extremely scaled MOSFETs

Photoelectric sensor and display panel