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Tsunenobu Kimoto

Researcher at Kyoto University

Publications -  635
Citations -  15807

Tsunenobu Kimoto is an academic researcher from Kyoto University. The author has contributed to research in topics: Silicon carbide & Diode. The author has an hindex of 58, co-authored 622 publications receiving 13668 citations. Previous affiliations of Tsunenobu Kimoto include Eötvös Loránd University & Sumitomo Electric Industries.

Papers
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Strong impact of the initial III/V ratio on the crystalline quality of an AlN layer grown by rf-plasma-assisted molecular-beam epitaxy

TL;DR: In this paper, the initial Al/N ratio for AlN growth of plasma-assisted molecular-beam epitaxy without plasma stabilization was investigated, and the in situ growth rate of AlN gradually increased and its temporal variation corresponded to that of nitrogen atoms.
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Fast epitaxial growth of high-purity 4H-SiC(\(000\bar 1\)) in a vertical hot-wall chemical vapor deposition) in a vertical hot-wall chemical vapor deposition

TL;DR: The 3C hillocks are formed on the epilayers grown under relatively low C/Si ratios as mentioned in this paper, and the hillock density has been decreased to 1 cm−2 under the C-rich condition, the concentrations of residual impurity (nitrogen) and intrinsic defects (Z1/2 and EH6/7).
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Deep levels in electron-irradiated n-and p-type 4H-SiC investigated by deep level transient spectroscopy

TL;DR: In this paper, the authors investigated deep levels in electron-irradiated n- and p-type 4H-SiC epilayers by deep level transient spectroscopy (DLTS).
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Temperature dependence of current gain in 4H-SiC bipolar junction transistors

TL;DR: In this paper, the temperature dependence of current gain from 140 to 460 K in 4H-SiC bipolar junction transistors (SiC BJTs) was investigated and the current gain increased from 110 to 1200 with decreasing temperature from 460 to 200 K. The high current gain at low temperature can be attributed to the enhanced incomplete ionization of aluminum acceptors in the base layer, resulting in the increase in injection efficiency.
Patent

Pinch-off type vertical junction field effect transistor and method of manufacturing the same

TL;DR: In this paper, a junction field effect transistor (JFET) is provided that is capable of high voltage resistance, high current switching operation, that operates with a low loss, and that has little variation.