There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

The problem of achieving compact, high-performance forced liquid cooling of planar integrated circuits has been investigated. The convective heat-transfer coefficient h between the substrate and the coolant was found to be the primary impediment to achieving low thermal resistance. For laminar flow in confined channels, h scales inversely with channel width, making microscopic channels desirable. The coolant viscosity determines the minimum practical channel width. The use of high-aspect ratio channels to increase surface area will, to an extent, further reduce thermal resistance. Based on these considerations, a new, very compact, water-cooled integral heat sink for silicon integrated circuits has been designed and tested. At a power density of 790 W/cm2, a maximum substrate temperature rise of 71°C above the input water temperature was measured, in good agreement with theory. By allowing such high power densities, the heat sink may greatly enhance the feasibility of ultrahigh-speed VLSI circuits.

High-performance heat sinking for VLSI

The applications of graphene and transition metal dichalcogenides in electronics are limited by their zero-bandgap and low mobility, respectively. Here, the authors demonstrate the potential of an emerging layered material—black phosphorous—for thin film electronics and infrared optoelectronics.

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Rediscovering black phosphorus as an anisotropic layered material for optoelectronics and electronics

Power dissipation and thermal issues are increasingly significant in modern processors. As a result, it is crucial that power/performance tradeoffs be made more visible to chip architects and even compiler writers, in addition to circuit designers. Most existing power analysis tools achieve high accuracy by calculating power estimates for designs only after layout or floorplanning are complete. In addition to being available only late in the design process, such tools are often quite slow, which compounds the difficulty of running them for a large space of design possibilities.This paper presents Wattch, a framework for analyzing and optimizing microprocessor power dissipation at the architecture-level. Wattch is 1000X or more faster than existing layout-level power tools, and yet maintains accuracy within 10% of their estimates as verified using industry tools on leading-edge designs. This paper presents several validations of Wattch's accuracy. In addition, we present three examples that demonstrate how architects or compiler writers might use Wattch to evaluate power consumption in their design process.We see Wattch as a complement to existing lower-level tools; it allows architects to explore and cull the design space early on, using faster, higher-level tools. It also opens up the field of power-efficient computing to a wider range of researchers by providing a power evaluation methodology within the portable and familiar SimpleScalar framework.

Wattch: a framework for architectural-level power analysis and optimizations

National Institute of Standards and Technology における超伝導研究及び生活

Multiple-input multiple-output (MIMO) communication systems require well-designed synchronization schemes in the receiver to meet stringent QoS requirements. In particular, OFDM modulation is very sensitive to timing synchronization errors, which cause inter-symbol interference. This paper describes a frame-start detection algorithm, which relies on received signal power increase and does not require any special properties of the transmitted signal. The performance is analyzed and then, verified through simulations in a MIMO system employing orthogonal frequency division multiplexing. Finally, a low-complexity FPGA implementation of the presented algorithm is described in detail.

/pdf/implementation-of-a-low-complexity-frame-start-detection-1zyn9lf4v4.pdf

Implementation of a Low-Complexity Frame-Start Detection Algorithm for MIMO Systems

In this paper useful physical objects called moments of the inverse scattering operator (MISO) of the Boltzmann equation (BE) are studied. The existence and uniqueness of the MISO is proven and a simple, generally valid, iterative scheme to actually compute those objects is given. The applications of the MISO extend from the computation of the solution for the space-homogeneous BE for small electric and magnetic fields to the exact computation of any transport parameter. This can be done for all moments of the space-inhomogeneous BE and for arbitrary electric and magnetic field intensities. The concept of MISO offers an elegant way to avoid the relaxation time approximation (RTA) every time it comes into play, not only theoretically but also in practical computations.

/pdf/moments-of-the-inverse-scattering-operator-of-the-boltzmann-4pxd16een7.pdf

Moments of the Inverse Scattering Operator of the Boltzmann Equation: Theory and Applications

Pilot-assisted channel estimation for communication systems employing orthogonal frequency division multiplexing modulation requires significant signal processing at the receiver if the correlation among the frequency-domain channel coefficients is to be exploited in order to improve accuracy In this work, a conventional FFT processor is extended to support all operations required by a selected channel estimation algorithm, so that both OFDM de/modulation and channel estimation can be efficiently performed on the same hardware unit The silicon complexity of the extended processor, which was prototyped in a real-time testbed using FPGAs, is compared to a conventional FFT processor

FFT Processor for OFDM Channel Estimation

Proof of a simple time-step propagation scheme for Monte Carlo simulation

Measured and simulated turn-off curves of high-voltage MCTs (MOS-controlled thyristors) and IGBTs (insulated-gate bipolar transistors) are presented Device simulation results show that the inherently faster-switching IGBT is much more affected by dynamic avalanche phenomena than the MCT It is also shown that the avalanche-injected carriers can be removed by shorting the anode layer, resulting in a much higher turn-off performance for both devices Because of the lower charge and therefore the higher dV/dt, the ionization rate is higher in the IGBT than in the MCT >

Wolfgang Fichtner

Papers

Implementation of a Low-Complexity Frame-Start Detection Algorithm for MIMO Systems

Moments of the Inverse Scattering Operator of the Boltzmann Equation: Theory and Applications

FFT Processor for OFDM Channel Estimation

Proof of a simple time-step propagation scheme for Monte Carlo simulation

A comparison of the switching behavior of IGBT and MCT power devices