Showing papers in "International Journal of Circuit Theory and Applications in 2015"

Experimental studies on realization of fractional inductors and fractional-order bandpass filters

Abstract: This paper presents the hardware realization and performance study of fractional inductors of order 0<α<2. The fractional inductors used in this work have been realized with the help of general impedance converter circuit and fractional capacitors. Impedance characterization of fractional inductors with different exponents has been carried out experimentally. Also a generalized approach to design a fractional-order bandpass filter is discussed in this work. The fractional-order bandpass filter consists of a series combination of a resistor, a fractional inductor of order 1<α<2, and a fractional capacitor of order 0<β<1. The performance of fractional-order bandpass filters has been studied and compared with corresponding integer-order filters through both experimentation and simulation. Copyright © 2014 John Wiley & Sons, Ltd.

SPICE modeling of nonlinear memristive behavior

Abstract: The recent discovery of the 'modern' memristor has drawn great attention of both academia and industry. Given their favorable performance merits, memristors are expected to play a fundamental role in electronic industry. Modeling of memristive devices is essential for circuit design, and a number of Simulation Program with Integrated Circuit Emphasis SPICE models have already been introduced. The common problem in most models is that there is no threshold consideration; hence, only a few address the nonlinear nature of the device. This paper aims to present a SPICE implementation of a threshold-type switching model of a voltage-controlled memristive device that attributes the switching effect to a tunneling distance modulation. Threshold-type switching is closer to the actual behavior of most experimentally realizable memristive systems, and our modeling approach addresses the issue of programming thresholds. Both the netlist and the simple schematic are provided, thus making it easy to comprehend and ready to be used. Compared with other modeling solutions, it involves significantly low-complexity operation under an unlimited set of frequencies, and its simulation results are in good qualitative and quantitative agreement with the theoretical formulation. The proposed model is used to simulate an antiserial memristive switch, proving that it can be efficiently introduced in complex memristive circuits. Copyright © 2013 John Wiley & Sons, Ltd.

0.5-V fractional-order companding filters

Abstract: Novel configurations of fractional-order filter topologies, realized through the employment of the concept of companding filtering, are introduced in this paper. As a first step, the design procedure is presented in a systematic algorithmic way, while in the next step, the basic building blocks of sinh-domain and log-domain integrators are presented. Because of the employment of metal-oxide-semiconductor MOS transistors operated in the subthreshold region, the derived filter structures offer the capability for operation in an ultra-low-voltage environment. In addition, because of the offered resistorless realizations, the proposed topologies are reconfigurable, in the sense that the order of the filter could be chosen through appropriate bias current sources. The performance of the derived fractional-order filters has been evaluated through simulation and comparison results using the Analog Design Environment of the Cadence software and MOS transistor parameters provided by the Taiwan Semiconductor Manufacturing Company TSMC 180-nm complementary MOS CMOS process. Copyright © 2014 John Wiley & Sons, Ltd.

Design and performance study of phase-locked loop using fractional-order loop filter

Abstract: The present work reports the realization of an analog fractional-order phase-locked loop FPLL using a fractional capacitor. The expressions for bandwidth, capture range, and lock range of the FPLL have been derived analytically and then compared with the experimental observations using LM565 IC. It has been observed that bandwidth and capture range can be extended by using FPLL. It has also been found that FPLL can provide faster response and lower phase error at the time of switching compared to its integer-order counterpart. Copyright © 2014 John Wiley & Sons, Ltd.

Design and optimization of a 3‐coil resonance‐based wireless power transfer system for biomedical implants

Abstract: SUMMARYThis paper presents a resonance-based wireless power transfer system using a single layer of inductor coilwindings, in a pancake configuration, in order to obtain a compact system for implantable electronic appli-cations. We theoretically analyzed the system and characterized it by measuring its inductance, self-resonantfrequency, and quality factor Q. In our resonance-based wireless power transfer prototype, we proposed a3-coil system, using two 15-mm radius implantable coils, with a resonance frequency of 6.76MHz. Thissystem can effectively transfer power for a distance of up to 50mm. Moreover, our proposed 3-coil systemcan achieve a high Q-factor and has a comparable power transfer efficiency (PTE) to previously reportedworks about 3-coil and 4-coil systems. The experimental PTE can achieve 82.4% at a separation distanceof 20mm and more than 10% PTE at a distance of 40mm. Copyright © 2014 John Wiley & Sons, Ltd. Received 25 March 2014; Revised 1 August 2014; Accepted 26 August 2014KEY WORDS:

An interleaved high step‐up DC‐DC converter with double boost paths

Abstract: Summary This paper proposed a novel high step-up converter with double boost paths. The circuit uses two switches and one double-path voltage multiplier cell to own the double boost and interleaved effects simultaneously. The voltage gain ratio of the proposed DC-DC converter can be three times the ratio of the conventional boost converter such that the voltage stress of the switch can be lower. The high step-up performance is in accordance with only one double-path voltage multiplier cell. Therefore, the number of diodes and capacitors in the proposed converter can be reduced. Furthermore, the interleaved property of the proposed circuit can reduce the losses in the rectifier diode and capacitor. The prototype circuit with 24-V input voltage, 250-V output voltage, and 150-W output power is experimentally realized to verify the validity and effectiveness of the proposed converter. Copyright © 2014 John Wiley & Sons, Ltd.

Theory on resistance of m×n cobweb network and its application

Abstract: A basic theorem of equivalent resistance between two arbitrary nodes in an m×n cobweb network in both finite and infinite conditions is discovered, and two conjectures on the equivalent resistance are proved in terms of the basic theorem. We built a tridiagonal matrix equation by means of network analysis and made a diagonalization method of matrix transformation and work out its explicit expressions. The new formulae obtained here can be effectively applied in complex impedance network, especially the formulation leads to the occurrence of resonances and a series of novel results in RLC denote resistor, inductance and capacitance network. These curious results suggest the possibility of practical applications to resonant circuits. Copyright © 2014 John Wiley & Sons, Ltd.

RF and microwave high‐Q floating active inductor design and implementation

Abstract: Summary In this paper, a high-Q floating active inductor (FAI), suitable for RF and microwave applications, is presented. The proposed FAI is based on two cascaded pairs of highly linear capacitance gyrators, which provide a symmetric and reciprocal structure. The proposed FAI shows fully symmetrical two-port characteristics, high quality factor and high linearity. As a feasibility demonstration, a prototype of the designed FAI has been fabricated, together with an LC series band-pass filter. At the operating frequency, the real part of the impedance of the equivalent FAI is very low (Req = 0.0039 Ω), providing a very high quality factor. The filter has a central frequency of 430 MHz and a −3 dB bandwidth of about 9 MHz. Copyright © 2014 John Wiley & Sons, Ltd.

Single transistor high linearity and wide dynamic range active inductor

Abstract: In this paper, an active inductor AI with high linearity and high dynamic range, including a minimum number of components, is presented. The AI is composed by a single transistor, and by a passive compensation network; the latter allows the control of the values of both the inductance and the series resistance.

Formulae of resistance between two corner nodes on a common edge of the m × n rectangular network

Abstract: Summary This paper deals with the equivalent resistance for the m × n resistor network in both finite and infinite cases. Firstly, we build a difference equation driven by a tridiagonal matrix to model the network; then by performing the diagonalizing transformation on the driving matrix, and using the auxiliary function tz(x,n), we derive two formulae of the equivalent resistance between two corner nodes on a common edge of the network. By comparing two different formulae, we also obtain a new trigonometric identity here. Our framework can be effectively applied in complex impedance networks. As in applications in the LC network, we find that our formulation leads to the occurrence of resonances at frequencies associated with (n + 1)ϕt = kπ. This somewhat curious result suggests the possibility of practical applications of our formulae to resonant circuits. At the end of the paper, two other formulae of an m × n resistor network are proposed. Copyright © 2014 John Wiley & Sons, Ltd.

Harmonic modelling of PV systems for probabilistic harmonic load flow studies

Abstract: Probabilistic harmonic load flow HLF is currently enjoying renewed popularity This is not surprising since in the near future, thousands of photovoltaic PV systems will be integrated into distribution systems However, as yet, there is no model capable of explaining PV harmonic current behaviour in probabilistic HLF studies To fill this gap, the harmonic modelling of PV systems proposed in this paper has three key points First, it provides an effective model of the relationship between PV harmonic current emission and background harmonic voltages Second, it statistically characterises PV harmonic currents relative magnitude and phase angle at different fundamental-frequency current output intervals using historical time-series data In this statistical characterisation, the first fifth moments of each PV harmonic current are used to accurately approximate the raw probability density function PDF by means of the Legendre series Finally, the third key point of this harmonic modelling is a method capable of determining the distribution functions of PV harmonic currents absolute magnitude and phase angle, based on the statistical characterisation and a fundamental-frequency probabilistic PV model The numerical results obtained confirm the effectiveness of this PV model Copyright © 2014 John Wiley & Sons, Ltd

Synthesis of n-port resistive networks containing 2n terminals

Abstract: This paper is concerned with the realizability problem of n-port resistive networks that contain 2n terminals. A necessary and sufficient condition for any real symmetric matrix to be realizable as the admittance of an n-port resistive network containing 2n terminals is obtained. This condition is based on the existence of a parameter matrix. Furthermore, the values of the elements are expressed in terms of the entries of the admittance matrix and the parameter matrix. Finally, a numerical example is used to illustrate the results. Copyright © 2013 John Wiley & Sons, Ltd.

Design of novel efficient adder and subtractor for quantum‐dot cellular automata

Abstract: Summary Quantum-dot cellular automata (QCA) is one of the new emerging technologies being investigated as an alternative to complementary metal oxide semiconductor technology. This paper proposes optimized one-bit full adder (FA) for implementation in QCA. The fault effects at the proposed FA outputs due to the missing cell defects are analyzed, and the test vectors for detection of all faults are identified. Also, the efficient designs of one-bit full subtractor (FS), one-bit FA/FS and four-bit carry flow adder (CFA) are presented using the proposed FA. These structures are designed and simulated using QCADesigner software. The proposed designs are compared with other previous works. In comparison with the best previous design, the proposed FA has 25% and 26% improvement in cells count and area, respectively, and it is faster. For the proposed FS, FA/FS and CFA, the obtained results confirm that these designs are more efficient in terms of area, cell count and delay. Therefore, the implementation of these designs may lead to the efficient use of the calculative unit in various applications, which may be used as a basic building block of a general purpose nanoprocessor. Copyright © 2014 John Wiley & Sons, Ltd.

Dynamic modeling of a dual active bridge DC to DC converter with average current control and load-current feed-forward

Abstract: This work was supported by the Spanish Ministry of Economy and Competitiveness under grant ENE2012-37667-C02-01.

A compact, low-frequency, memristor-based oscillator

Abstract: A relaxation oscillator using a memristor is hereby presented. The memristor is used to substitute the function of a capacitor in an equivalent RC oscillator. The voltage across the memristor changes according to the quantity and polarity of the current passing through, thus substituting the changing voltage across a capacitor in the equivalent RC oscillator. The memristor has the advantage of occupying much less area than the equivalent capacitor, which may be important when trying to build on-chip oscillators for portable or medical applications. Copyright © 2014 John Wiley & Sons, Ltd.

Ultra-low-noise large-bandwidth transimpedance amplifier

Abstract: SUMMARY Equivalent input current noise and bandwidth are the most relevant parameters qualifying a low-noise transimpedance amplifier. In the conventional topology consisting of an operational amplifier in a shunt-shunt configuration, the equivalent input noise decreases as the feedback resistor (RF), which also sets the gain, increases. Unfortunately, as RF increases above a few MΩ, as it is required for obtaining high sensitivity, the bandwidth of the system is set by the parasitic capacitance of RF and reduces as RF increases. In this paper, we propose a new topology that allows overcoming this limitation by employing a large-bandwidth voltage amplifier together with a proper modified feedback network for compensating the effect of the parasitic capacitance of the feedback resistance. We experimentally demonstrate, on a prototype circuit, that the proposed approach allows to obtain a bandwidth in excess of 100 kHz and an equivalent input noise of about 4 fA/, corresponding to the current noise of the 1 GΩ resistor that is part of the feedback network. The new approach allows obtaining larger bandwidth with respect to those obtained in previously proposed configurations with comparable background noise. Copyright © 2014 John Wiley & Sons, Ltd.

Constructing hyperchaotic systems at will

Abstract: SUMMARY Over the last two decades, chaotification has received increasing attention from various communities of science and engineering. This paper aims at developing a unified chaotification framework for generating desired higher-dimensional dissipative hyperchaotic systems by using a single-parameter controller. The main idea is to use a block diagonal matrix in the design of the nominal system, so as to construct a desired hyperchaotic system. Specifically, the proposed scheme is to assign desired closed-loop poles to the controlled system, allocating the corresponding numbers of eigenvalues with positive real parts at two types of saddle-focus equilibria. For the non-degenerate case, the number of positive Lyapunov exponents of the controlled system is given by the largest number of positive Lyapunov exponents of the desired hyperchaotic system. Two representative examples are given to illustrate and verify the proposed design method. Finally, the digital signal processor is employed to implement the above 10-dimensional hyperchaotic systems, and the experimental observation is also given. Copyright © 2015 John Wiley & Sons, Ltd.

A novel quasi-Z-source indirect matrix converter

Abstract: A new type of three-phase quasi-Z-source indirect matrix converter QZS-IMC is proposed in this paper. It uses a unique impedance network for achieving voltage-boost capability and making the input current in continuous conduction mode CCM to eliminate the input filter. The complete modulation strategy is proposed to operate the QZS-IMC. Meanwhile, a closed-loop DC-link peak voltage control strategy is proposed, and the DC-link peak voltage is estimated by measuring both the input and capacitor voltages. With this proposed technique, a high-performance output voltage control can be achieved with an excellent transient performance even if there are input voltage and load current variations. The controller is designed by using the small-signal model. Vector control scheme of the induction motor is combined with the QZS-IMC to achieve the motor drive. A QZS-IMC prototype is built in laboratory, and experimental results verify the operating principle and theoretical analysis of the proposed converter. The simulation tests of QZS-IMC based inductor motor drive are carried out to validate the proposed converter's application in motor drive. Copyright © 2013 John Wiley & Sons, Ltd.

Efficiency of magnetic coupled boost DC‐DC converters mainly dedicated to renewable energy systems: influence of the coupling factor

Abstract: Summary This paper presents a specific analysis of an individual basic magnetically coupled direct current-to-direct current (DC–DC) converter specially designed for integration in a distributed architecture of renewable energy generators for smart grid applications. In such distributed architecture dedicated for renewable energy, parallel high-voltage DC presents many advantages over the classical centralized one. We show that in such setup, high voltage can be advantageously produced using a specific magnetically coupled boost converter, and we point out the influence of the coupling factor, generally considered equal to one, on the overall performance of the converter and on the global energy efficiency of the installation. In this study, the generalized concepts of system energy parameters of DC–DC converters are introduced and applied to the transient analysis. Consequently, the operation of a magnetic coupled DC–DC converter with a recovery stage is modeled. The simulation results are compared with those of the behavioral study, deduced from the model pointing out the large influence of the coupling factor value on the global behavior and mainly on the value of the recovery voltage, in all the various parts of the switching cycle. The renewable energy generator operating parameters, such as current and voltage values, can then be predicted in a more useful way to compute new similar DC–DC converter systems. Copyright © 2014 John Wiley & Sons, Ltd.

Wide‐band divide‐by‐2 injection‐locked frequency divider using MOSFET mixers DC‐biased in subthreshold region

Abstract: Summary A novel wide locking range divide-by-2 injection-locked frequency divider (ILFD) is proposed in the paper and was implemented in the TSMC 0.18-µm 1P6M CMOS process. The divide-by-2 ILFD is based on a cross-coupled voltage-controlled oscillator (VCO) with an LC resonator and injection MOSFETs with source voltage coupled from ILFD output, and the injection MOSFET mixer is biased in subthreshold region. At the drain–source bias of 0.9 V, and at the incident power of 0 dBm the locking range of the divide-by-2 ILFD is 6.4 GHz; from the incident frequency 3.7 GHz to 10.1 GHz, the percentage is 92.75%. The core power consumption is 16.56 mW. The die area is 0.839 × 0.566 mm2. Copyright © 2015 John Wiley & Sons, Ltd.

Temperature dependant crosstalk analysis in coupled single-walled carbon nanotube (SWCNT) bundle interconnects

Abstract: The temperature-dependent, crosstalk-induced, noise voltage waveform and its frequency spectrum, in capacitive coupled single-walled carbon nanotube (SWCNT) bundle interconnects, at the far end of victim line, have been analyzed at 22-nm technology node. A similar analysis is performed for copper interconnects and a comparison is made between the results of these two analyses. The SPICE simulation results reveal that at temperature variations ranging from 300 to 500 K, compared with conventional metal (copper) conductors, crosstalk noise voltage levels in CNT, at the far end of victim line, are significantly low. Simulated results further reveal that, with rise in interconnect temperatures, compared with copper interconnects, coupled interconnects of SWCNT bundle filter more noise frequency components. Based on these comparative results, an improved model for extracting inter-bundle, real life, coupling capacitances between SWCNT bundles has been proposed. Copyright © 2014 John Wiley & Sons, Ltd.

Resistance and capacitance of 4×n cobweb network and two conjectures

Abstract: A classic problem in electric circuit theory studied by numerous authors over 160 years is the computation of the resistance between two nodes in a resistor network, yet some basic problem in m×n cobweb network is still not solved ideally. The equivalent resistance and capacitance of 4×n cobweb network are investigated in this paper. We built a quaternion matrix equation and proposed the method of matrix transformations in terms of the network analysis. We proposed a brief equivalent resistance formula and find that the equivalent resistance is expressed by coskπ/9 in a series of strict calculation. Meanwhile, an equivalent resistance of infinite networks is gained. Using the inverse mapping relation between capacitance parameters and resistance parameters, the equivalent capacitance formula is also given for the 4×n capacitance cobweb network. By analyzing and comparing the equivalent resistances of the 1×n, 2×n, 3×n and 4×n cobweb networks, two conjectures on the equivalent resistance and capacitance of the m×n cobweb network are proposed. Copyright © 2013 John Wiley & Sons, Ltd.

Resistive-less memcapacitor-based relaxation oscillator

Abstract: Summary Recently, the realization of the conventional relaxation oscillators was introduced based on memristors. This paper validates the concept using two series memcapacitors in general which is applicable for a capacitor and memcapacitor as well. Furthermore, the necessary conditions for oscillation are introduced, and a generalized closed-form expression for the oscillation frequency is derived. Two special cases are introduced and verified using PSPICE simulations showing a perfect matching. Copyright © 2014 John Wiley & Sons, Ltd.

A 0.5V bulk-driven voltage follower/DC level shifter and its application in class AB output stage

Abstract: A simple realization of a 0.5V bulk-driven voltage follower/direct current DC level shifter designed in a 0.18µm CMOS technology is presented in the paper. The circuit is characterized by large input and output voltage swings and a DC voltage gain close to unity. The DC voltage shift between input and output terminals can be regulated in a certain interval around zero, by means of biasing current sinks. An application of the proposed voltage follower circuit for realization of a low-voltage class AB output stage has also been described in the paper. Finally, the operational amplifier exploiting the proposed output stage has been presented and evaluated in detail. Copyright © 2014 John Wiley & Sons, Ltd.

MTL-based implementation of current-mode CMOS RMS-to-DC converters

Abstract: In this paper, systematic implementation of current-mode RMS-to-DC converters based upon MOS translinear MTL principle, utilizing symmetric cascoded MTL cell SCMC is proposed. Theory of operation and mathematical analysis of both explicit direct and implicit indirect techniques for realization of SCMC-based RMS-to-DC converters are discussed. The SCMC includes a folded MTL loop and realizes an MTL equation. MTL principle utilizes the square law characteristics of saturated MOS transistors to realize square-root domain SRD functions. The SCMC is constructed by two connected cascoded current mirrors and has a compact, symmetric, and multi-purpose structure, with capability of implementing the circuits into the programmable and configurable structures. The proposed RMS-to-DC converters utilize the SCMC along with a configurable current mirror array. The required squaring and square-rooting functions are realized using the SCMC, after proper configuration of the current mirror array. The proposed circuits have been implemented using a reconfigurable architecture fabricated in a 0.5i¾?µm CMOS technology. Copyright © 2014 John Wiley & Sons, Ltd.

Analytical synthesis of voltage‐mode even/odd‐nth‐order differential difference current conveyor and fully differential current conveyor II‐grounded resistor and capacitor universal filter structures

Abstract: Summary A complete definition of an odd/even-nth-order notch or band-reject filter transfer function is presented. Based on the differences between the input voltage and (i) an nth-order high-pass; (ii) a traditional nth-order notch; and (iii) an nth-order all-pass filtering transfer function, a systematic method has been proposed to derive a universal filter structure that can realize voltage-mode odd/even-nth-order low-pass, band-pass, high-pass, all-pass and traditional notch filters. The intrinsic capability of voltage-mode addition and subtraction of the two active elements, differential difference current conveyors and fully differential current conveyors, is used to advantage in the aforementioned synthesis procedure. Based upon the definition of an nth-order notch or band-reject filter transfer function proposed in this paper, the aforementioned universal one has been further extended to the newly defined nth-order band rejection filter. The voltage and current tracking errors of the two active elements are compensated by varying the resistances of the proposed filter. Filtering feasibility, stability, component sensitivities, linear and dynamic ranges, power consumption, and noise are simulated using H-Spice with 0.35 µm process. Compared to some of the recently reported universal biquads, the new one is shown to enjoy the lowest component sensitivities and the best output accuracy for all-pass signals. Moreover, Monte Carlo and two-tone tests for intermodulation linearity simulations are also investigated. Copyright © 2014 John Wiley & Sons, Ltd.

Limit-cycle stable control of current-mode dc-dc converter with zero-perturbation dynamical compensation

Abstract: Regarding the non-limit-cycle instabilities, which commonly exist in the feedback-controlled switching power converters, a new zero-perturbation dynamical compensation method is proposed based on a simplified self-stable dynamical compensation condition in this paper. With a current-mode Buck converter as the subject of investigation, the corresponding self-stable perturbation control equation is given. At the same time, the system stability boundary is obtained based on the investigation of the system eigenvalues, and hence, the working range of control parameters is determined. Finally, the presented simulation and experiment results reveal that the new zero-perturbation dynamical compensation controller is easily realized with an analog circuit and it will not sacrifice the working range of the original reference current compared with the traditional slope compensation. Copyright © 2013 John Wiley & Sons, Ltd.

Space vector pulse-width modulation for single-phase full-bridge Z-source inverter

Abstract: The space vector pulse-width-modulation technique is extensively applied in the three-phase power electronics circuits because of its easy digital implementation and wide linear modulation range features. However, the attempt of this technique for the single-phase Z-source inverter has seldom been reported because of its unique topology and operational characteristics. In this paper, based on an in-depth mathematical derivation and theoretical explanation, the space vector pulse-width-modulation principles have been discussed in detail. Various implementation schemes are demonstrated, and a comparison study for selected switching patterns is conducted. In addition, the theoretical analysis is validated by both the simulation and experimental results. This work will be helpful for understanding the space vector pulse-width-modulation concept and modulation techniques of the single-phase full-bridge Z-source inverters. Copyright © 2013 John Wiley & Sons, Ltd.

Control of sub-harmonic oscillation in peak current mode buck converter with dynamic resonant perturbation

Abstract: Summary In this paper, a dynamic resonant perturbation (DRP) method is proposed to control sub-harmonic oscillation in a peak current mode controlled buck converter. Different from the traditional non-feedback resonant parametric perturbation method, the proposed DRP method extracts an approximate sinusoidal control signal from the output voltage. The self-stabilizing condition for the designed control signal is presented, and its analog circuit implementation is given as well. Furthermore, the system stability boundary is obtained by investigating the system eigenvalues, and the control parameter is effectively determined. The presented simulation and experiment results show that the proposed DRP method eliminates sub-harmonic oscillation without sacrificing the peak value of the inductor current and features with a self-stabilizing characteristic for external condition changes. Copyright © 2014 John Wiley & Sons, Ltd.