Journal ArticleDOI
Analytical surface potential modeling and simulation of junction-less double gate (JLDG) MOSFET for ultra low-power analog/RF circuits
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TLDR
The purpose of this research is to provide a physical explanation for improved analog and RF performance exhibited by the device.About:
This article is published in Microelectronics Journal.The article was published on 2015-10-01. It has received 38 citations till now. The article focuses on the topics: Channel length modulation & MOSFET.read more
Citations
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Journal ArticleDOI
A review on performance comparison of advanced MOSFET structures below 45 nm technology node
TL;DR: In this article, several gate and channel engineered MOSFET structures are analyzed and compared for sub 45 nm technology node for analog/RF performance in terms of IOFF, subthreshold performance parameters and DIBL values.
Journal ArticleDOI
Improved analog/RF performance of double gate junctionless MOSFET using both gate material engineering and drain/source extensions
TL;DR: In this article, the authors proposed a new double gate junctionless (DGJ) MOSFET design based on both gate material engineering and drain/source extensions, where the proposed device shows excellent ability in improving the analog/RF performance and provides higher drain current and improved figures-of-merit as compared to the conventional DGJ MOSFL.
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Reliability analysis of Junction-less Double Gate (JLDG) MOSFET for analog/RF circuits for high linearity applications
TL;DR: Thermal stability of the JLDG MOSFET has been tested for operating the device over a wide range of temperatures ranging from 200K to 500K, so that the effect of temperature on the performance issues remains limited.
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Impact of thin high-k dielectrics and gate metals on RF characteristics of 3D double gate junctionless transistor
TL;DR: In this article, the performance of 3D double gate junctionless transistor (JLT) with 20-nm gate length is investigated considering thin high-k dielectrics and gate metals.
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Linearity Distortion Analysis of Junctionless Quadruple Gate MOSFETs for Analog Applications
TL;DR: In this paper, the authors examined a junctionless quadruple gate (JLQG) MOSFET for analog and linearity distortion performance by numerically calculating transconductance and its higher order derivatives.
References
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Journal ArticleDOI
Nanowire transistors without junctions
Jean-Pierre Colinge,Chi-Woo Lee,Aryan Afzalian,Aryan Afzalian,Nima Dehdashti Akhavan,Ran Yan,Isabelle Ferain,Pedram Razavi,B. O'Neill,Alan Blake,Mary White,Anne-Marie Kelleher,Brendan McCarthy,Richard Murphy +13 more
TL;DR: A new type of transistor in which there are no junctions and no doping concentration gradients is proposed and demonstrated, which has near-ideal subthreshold slope, extremely low leakage currents, and less degradation of mobility with gate voltage and temperature than classical transistors.
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Device scaling limits of Si MOSFETs and their application dependencies
TL;DR: The end result is that there is no single end point for scaling, but that instead there are many end points, each optimally adapted to its particular applications.
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Junctionless multigate field-effect transistor
Chi-Woo Lee,Aryan Afzalian,Nima Dehdashti Akhavan,Ran Yan,Isabelle Ferain,Jean-Pierre Colinge +5 more
TL;DR: In this article, the authors describe a metaloxide-semiconductor MOS transistor concept in which there are no junctions and the channel doping is equal in concentration and type to the source and drain extension doping.
Journal ArticleDOI
Frontiers of silicon-on-insulator
TL;DR: In this article, the authors discuss methods of forming silicon-on-insulator (SOI) wafers, their physical properties, and the latest improvements in controlling the structure parameters.
Journal ArticleDOI
Performance estimation of junctionless multigate transistors
Chi-Woo Lee,Isabelle Ferain,Aryan Afzalian,Ran Yan,Nima Delidashti Akhavan,Pedrarn Razavi,Jean-Pierre Colinge +6 more
TL;DR: In this paper, the authors describe the simulation of the electrical characteristics of a new transistor concept called the junctionless multigate field effect transistor (MuGFET), which has no junctions, a simpler fabrication process, less variability and better electrical properties than classical inversionmode devices with PN junctions at the source and drain.