Journal ArticleDOI
A Compensation Technique for Two-Stage Differential OTAs
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TLDR
A frequency compensation method for operational transconductance amplifiers is proposed, which poses no power overhead compared to Miller compensation, while improving the 3-dB bandwidth, the unity gain frequency, and the slew rate.Abstract:
In this brief, a frequency compensation method for operational transconductance amplifiers is proposed, which poses no power overhead compared to Miller compensation, while improving the 3-dB bandwidth, the unity gain frequency, and the slew rate. The technique employees positive feedback to introduce an extra left half plane zero to cancel a pole. The phase margin shows good robustness against process and temperature variations. The proposed technique poses no design constraints on the transconductance or capacitor values, which makes it attractive for low-power applications with low area overhead.read more
Citations
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All-digital 1-1 MASH delta-sigma time-to-digital converter via time-mode signal processing
TL;DR: This paper presents an all-digital 1-1 MASH using time-mode signal processing and proposes a cascode time adder with a raised inverter threshold voltage and a differential time integrator consisting of a pair of identical single-ended time integrators to minimize the effect of the nonlinearities of the single-end time Integrator.
Journal ArticleDOI
Low-voltage Low-power Bulk-driven CMOS Op-Amp Using Negative Miller Compensation for ECG
TL;DR: In this article , the authors compared two op-amps based on two-stage amplification, where bulk-driven differential input is the first stage, while additional DC gain is the second stage.
Journal ArticleDOI
Design and Implementation of Multi-Channel Readout Circuits for Low-Temperature Environments
TL;DR: In this paper , a multi-channel preamplifier circuit based on ultra-low temperatures was designed to read the acquisition signals of infrared sensors and focal plane imaging arrays for subsequent processing, which showed excellent performance in driving large loads, providing high gain and consuming less power.
Journal ArticleDOI
A Maximum Efficiency-86% Hybrid Power Modulator for 5G New Radio(NR) Applications
TL;DR: In this article , a hybrid power modulator utilizing a two-level switching converter and a broadband and high-efficiency linear amplifier is presented for the radio frequency (RF) power amplifiers of 5G new radio (NR) applications.
Journal ArticleDOI
A 29.5 dBm OOB IIP3 TIA Based on a Two-Stage Pseudo-Differential OTA With R-C Compensation and Cascode Negative Resistance
TL;DR: In this article , a transimpedance amplifier (TIA) with 46 dB open-loop gain and 1 GHz unity-gain loop bandwidth (UGLB) is designed at low supply voltage (Vdd) to stabilize the differential mode (DM) loop, the phase margin (PM) is compensated with the zeros generated by the series of resistors and capacitors (R-C).
References
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Book
Analysis and Design of Analog Integrated Circuits
Paul R. Gray,Robert G. Meyer +1 more
TL;DR: In this article, the authors combine bipolar, CMOS and BiCMOS analog integrated circuits into a unified treatment that stresses their commonalities and highlights their differences, and provide valuable insights into the relative strengths and weaknesses of these important technologies.
Journal ArticleDOI
The Recycling Folded Cascode: A General Enhancement of the Folded Cascode Amplifier
R. Assaad,Jose Silva-Martinez +1 more
TL;DR: A recycling amplifier architecture based on the folded cascode transconductance amplifier is described, which delivers an appreciably enhanced performance over that of the conventional folded by using previously idle devices in the signal path, which results in an enhanced transc conductance, gain, and slew rate.
Journal ArticleDOI
A robust feedforward compensation scheme for multistage operational transconductance amplifiers with no Miller capacitors
B.K. Thandri,Jose Silva-Martinez +1 more
TL;DR: In this article, a multistage operational transconductance amplifier with a feedforward compensation scheme which does not use Miller capacitors is introduced, which uses the positive phase shift of left-halfplane (LHP) zeros caused by the feedforward path to cancel the negative phase shifting of poles to achieve a good phase margin.
Journal ArticleDOI
Three-stage large capacitive load amplifier with damping-factor-control frequency compensation
TL;DR: In this article, a damping factor control frequency compensation (DFCFC) technique was proposed to improve frequency response, transient response, and power supply rejection for amplifiers, especially when driving large capacitive loads.
Journal ArticleDOI
Single Miller capacitor frequency compensation technique for low-power multistage amplifiers
TL;DR: In this article, a low-power efficient three-stage amplifier topology suitable for large capacitive load applications is introduced, which uses a single Miller capacitor compensation (SMC) and single Miller capac feedforward compensation (SMFFC).