Proceedings ArticleDOI
Direct RF sampling mixer with recursive filtering in charge domain
Khurram Muhammad,Robert Bogdan Staszewski +1 more
- Vol. 1, pp 577-580
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TLDR
A direct RF sampling technique in which an input RF signal is converted to a current waveform, gated and integrated on a sampling capacitor, which creates a first order IIR filter which serves as an anti-alias filter for subsequent stages.Abstract:
We present a direct RF sampling technique in which an input RF signal is converted to a current waveform, gated and integrated on a sampling capacitor. A rotating capacitor shares this charge with the main sampling capacitor and transfers it to a subsequent discrete-time switched-capacitor filter stage. This action creates a first order IIR filter which serves as an anti-alias filter for subsequent stages. The transfer function of this stage can be changed by adjusting the clock signal controlling the rotating capacitor. This approach has been validated and incorporated in a commercial Bluetooth receiver IC realized in a digital 130 nm CMOS that meets or exceeds performance of other conventional Bluetooth radio architectures.read more
Citations
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Journal ArticleDOI
Noise Analysis for Comparator-Based Circuits
TL;DR: In this article, noise analysis for comparator-based analog-to-digital (ADC) circuits is presented, and the results show that the virtual ground threshold detection comparator dominates the overall ADC noise performance.
Journal ArticleDOI
The First Fully Integrated Quad-Band GSM/GPRS Receiver in a 90-nm Digital CMOS Process
Khurram Muhammad,Yo-Chuol Ho,T. Mayhugh,Chih-Ming Hung,T. Jung,Imtinan Elahi,Charles Lin,Irene Deng,C. Fernando,John Wallberg,Sudheer Vemulapalli,S. Larson,T. Murphy,Dirk Leipold,P. Cruise,J. Jaehnig,Meng-Chang Lee,Robert Bogdan Staszewski,Roman Staszewski,Ken Maggio +19 more
TL;DR: The receiver in the first single-chip GSM/GPRS transceiver that incorporates full integration of quad-band receiver, transmitter, memory, power management, dedicated ARM processor and RF built-in self test in a 90-nm digital CMOS process is presented.
Journal ArticleDOI
Digital RF processing: toward low-cost reconfigurable radios
TL;DR: In this article, the authors present fundamental techniques recently developed that migrate RF and analog design complexity to the digital domain for a wireless RF transceiver for multi-gigahertz frequencies.
Journal ArticleDOI
A Bluetooth Low-Energy Transceiver With 3.7-mW All-Digital Transmitter, 2.75-mW High-IF Discrete-Time Receiver, and TX/RX Switchable On-Chip Matching Network
Feng Wei Kuo,Sandro Binsfeld Ferreira,Huan-Neng Ron Chen,Lan-Chou Cho,Chewn-Pu Jou,Fu-Lung Hsueh,Iman Madadi,Massoud Tohidian,Mina Shahmohammadi,Masoud Babaie,Robert Bogdan Staszewski +10 more
TL;DR: An integrated on-chip matching network serves to both PA and low-noise transconductance amplifier, thus allowing a 1-pin direct antenna connection with no external band-selection filters.
Journal ArticleDOI
Discrete-Time Mixing Receiver Architecture for RF-Sampling Software-Defined Radio
TL;DR: A discrete-time (DT) mixing architecture for RF-sampling receivers is presented, which makes RF sampling more suitable for software-defined radio (SDR) as it achieves wideband quadrature demodulation and wideband harmonic rejection.
References
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Journal ArticleDOI
Jitter analysis of high-speed sampling systems
TL;DR: The jitter of such practical sampling systems as analog-to-digital converters, sample-and-hold circuits, and samplers is discussed and a model for estimating jitter is proposed, based on sampling sine-wave signal- to-noise ratio calculations.
Proceedings ArticleDOI
Jitter analysis of high speed sampling systems
Shinagawa,Akazawa,Wakimoto +2 more
TL;DR: It will be shown that effective band-width compro-ation between jitter reduction and operating speed are important for more advanced converter design, and accuracy and speed limitations of the converter will be discussed.
Proceedings ArticleDOI
A fully-integrated single-chip SOC for Bluetooth
Frank Op’t Eynde,J.-J. Schmit,V. Charlier,R. Alexandre,C. Sturman,K. Coffin,B. Mollekens,Jan Craninckx,S. Terrijn,A. Monterastelli,S. Beerens,P. Goetschalckx,Mark Ingels,D. Joos,S. Guncer,A. Pontioglu +15 more
TL;DR: A 0.25 /spl mu/m CMOS IC contains all analog and digital electronics required for a point-to-multipoint Bluetooth node and has 15 dB noise figure and 2 dBm maximum transmitter output.
Proceedings ArticleDOI
A Bluetooth radio in 0.18 μm CMOS
P.T.M. van Zeijl,Johannes Wilhelmus Theodorus Eikenbroek,P.-P. Vervoort,S. Setty,J. Tangenberg,G. Shipton,E. Kooistra,I. Keekstra,Didier Belot +8 more
TL;DR: By using an inductor-less LNA and the extensive use of mismatch simulations, the smallest silicon area for a Bluetooth radio implementation so far can be reached: 5.5 mm.
Proceedings ArticleDOI
A low noise quadrature subsampling mixer
TL;DR: Noise analysis of a subsampling mixer structure based on current signal sampling is performed and shows that a promisingly low noise figure can be obtained.