Effect of Asymmetric Layout and Unequal Junction Temperature on Current Sharing of Paralleled SiC MOSFETs With Kelvin-Source Connection

TLDR: In this paper, the effect of power source parasitic inductance on dynamic current sharing is investigated for paralleled SiC mosfet s with Kelvin-source connection and some guidelines are provided for layout design and application.

Abstract: Parallel connection of silicon carbide (SiC) mosfet s is a popular solution for high-capacity applications. In order to improve the switching speed of paralleled SiC mosfet s, Kelvin-source connection is widely employed. However, the influences of asymmetric layout and unequal junction temperature on current sharing of paralleled SiC mosfet s with Kelvin-source connection are not clear. This article addresses the issue for the first time by theoretical analysis and experimental verifications. The mechanism of current imbalance resulting from asymmetric layout and unequal junction temperature in the case with Kelvin-source connection is comprehensively investigated. Then, some significant discoveries are obtained. The static current sharing performance can be affected by drain and power source parasitic inductance, which is seldom mentioned before. Besides, this article first points out that the effect of power source parasitic inductance on dynamic current sharing is dominant compared with other parasitic inductance. What is more, the thermal–electric analyzing results suggest that there is a risk of thermal runaway for paralleled SiC mosfet s with Kelvin-source connection at high switching frequency due to positively temperature-dependent dynamic current and switching losses. Based on the discoveries, some guidelines are provided for layout design and application of paralleled SiC mosfet s with Kelvin-source connection.