Proceedings ArticleDOI
High performance extended drain MOSFETs (EDMOSFETs) with metal field plate
Mueng-Ryul Lee,Oh-Kyong Kwon +1 more
- pp 249-252
TLDR
In this article, the authors proposed a structure for extended drain MOSFETs with a metal field plate separated from the gate electrode instead of the polysilicon field plate.Abstract:
We propose a structure for extended drain MOSFETs (EDMOSFETs) with a metal field plate separated from the gate electrode instead of the polysilicon field plate in conventional LDMOSFETs. The specific on-resistance is improved by applying a higher voltage to the field plate than the gate voltage because of the enhanced conductivity modulation, and the breakdown voltage of 280 V is not changed by the field plate voltage. When a voltage of 50 V is applied to the field plate, the specific on-resistance of a 280 V EDMOSFET is 17.63 m/spl Omega/cm/sup 2/, which is lower than that of conventional LDMOSFETs by 11.8%. The performance of the EDMOSFETs is the best reported result in 280 V class lateral high voltage MOS devices.read more
Citations
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Journal ArticleDOI
A Novel Vertical Field Plate Lateral Device With Ultralow Specific On-Resistance
TL;DR: In this paper, a vertical field plate (VFP) lateral device with ultralow specific on-resistance (RON,sp) is proposed, where the depletion layer of the VFP expands to the bulk of the drift region, which enhances the bulk electric field.
Patent
Field effect transistor and method of manufacturing same
TL;DR: A field effect transistor (FET) as mentioned in this paper includes a drain region (12) having a first portion (18) and a second portion (20), with the second portion being more lightly doped than the first portion.
Patent
Method for fabricating an extended drain metal oxide semiconductor field effect transistor with a source field plate
Lee Dae Woo,Kim Jong Dae +1 more
TL;DR: In this paper, an extended drain metal oxide semiconductor field effect transistor (EDMOSFET) with a source field plate is provided, which includes a first-conductivity type semiconductor substrate, a gate insulating layer formed on the surface of the well region between the drift region and the source region, a first interlayer dielectric layer covering portions of the surfaces of the source and the drift regions and the gate conductive layer.
Journal ArticleDOI
Effects of Dummy Gate on Breakdown and Degradation of LDMOSFETs
TL;DR: In this paper, the effects of dummy-gate geometry and bias on breakdown and degradation of LDMOSFETs are quantified both theoretically and experimentally by using a 2D physical device simulator.
Journal ArticleDOI
High-voltage power integrated circuit technology using bulk-silicon for plasma display panels data driver IC
TL;DR: In this article, a novel highvoltage CMOS (HV-CMOS) structure and a compatible bulk-silicon (BS) CMOS process for color plasma display panel (PDP) data driver ICs have been proposed.
References
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TL;DR: The RESURF (Reduced SURface Field) as discussed by the authors is a diode-based diode structure for high voltage devices with very thin epitaxial or implanted layers, where crucial changes in the electric field distribution occur at or at least near the surface.
Patent
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Journal ArticleDOI
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S.C. Sun,James D. Plummer +1 more
TL;DR: Structural differences which result in on-resistance and transconductance differences between the devices are described and quantitative models, suitable for device design, are developed for the on-Resistance of each type of structure.
Journal ArticleDOI
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TL;DR: In this article, the quasi-saturation effect in VDMOS transistors is studied in detail, and it is shown that such behavior is due to carrier velocity saturation in the JFET region of the device.