Proceedings ArticleDOI
Top-down, constraint-driven design methodology based generation of n-bit interpolative current source D/A converters
Henry Chang,E. Liu,R. Neff,Eric Felt,E. Malavasi,Edoardo Charbon,Alberto Sangiovanni-Vincentelli,Paul R. Gray +7 more
- pp 369-372
TLDR
In this article, a top-down, constraint-driven design methodology is proposed to accelerate the design cycle for analog circuits and mixed-signal systems, and a design which demonstrates the two principal advantages that this methodology provides-a high probability for first silicon which meets all specifications and fast design times.Abstract:
To accelerate the design cycle for analog circuits and mixed-signal systems, we have proposed a top-down, constraint-driven design methodology. In this paper we present a design which demonstrates the two principal advantages that this methodology provides- a high probability for first silicon which meets all specifications and fast design times. We examine the design of three different 10-bit digital-to-analog (D/A) converters beginning from their performance and functional specifications and ending with the testing of the fabricated parts. Critical technology mismatch information gathered from the testing phase is provided. >read more
Citations
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Journal ArticleDOI
Automation of IC layout with analog constraints
TL;DR: A methodology for the automatic synthesis of full-custom IC layout with analog constraints is presented, guaranteeing that all performance constraints are met when feasible, or otherwise, infeasibility is detected as soon as possible, thus providing a robust and efficient design environment.
Proceedings ArticleDOI
Measurement and modeling of MOS transistor current mismatch in analog IC's
TL;DR: The new methodology is based on extracting the mismatch information from a fully functional circuit rather than on probing individual devices; this extraction leads to more efficient and more accurate mismatch measurement.
Journal ArticleDOI
CAD tools for data converter design: an overview
Georges Gielen,José E. Franca +1 more
TL;DR: An overview of the recent advances in modeling, simulation and structured synthesis that are pushing ahead the capabilities and efficiency of CAD tools for integrated data converter design is presented.
Embedding Mixed-Signal Design in Systems-on-Chip Innovative approaches and new design methodologies are needed to integrate digital, analog and RF components in CMOS systems-on-a-chip smaller than 100 nm.
Jan M. Rabaey,Fernando De Bernardinis,Ali M. Niknejad,Borivoje Nikolic,Alberto Sangiovanni-Vincentelli +4 more
TL;DR: In this paper, the authors present a platform-based design methodology to enable a mean- ingful exploration of the broad design space and to classify potential solutions in terms of the relevant metrics.
Journal ArticleDOI
Embedding Mixed-Signal Design in Systems-on-Chip
Jan M. Rabaey,F. De Bernardinis,Ali M. Niknejad,Borivoje Nikolic,Alberto Sangiovanni-Vincentelli +4 more
TL;DR: This work presents some of these solutions, including a structured platform-based design methodology to enable a meaningful exploration of the broad design space and to classify potential solutions in terms of the relevant metrics.
References
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Book
Linear and nonlinear programming
David G. Luenberger,Yinyu Ye +1 more
TL;DR: Strodiot and Zentralblatt as discussed by the authors introduced the concept of unconstrained optimization, which is a generalization of linear programming, and showed that it is possible to obtain convergence properties for both standard and accelerated steepest descent methods.
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Paul R. Gray,Robert G. Meyer +1 more
TL;DR: In this article, the authors combine bipolar, CMOS and BiCMOS analog integrated circuits into a unified treatment that stresses their commonalities and highlights their differences, and provide valuable insights into the relative strengths and weaknesses of these important technologies.
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Matching properties of MOS transistors
TL;DR: In this paper, the matching properties of the threshold voltage, substrate factor, and current factor of MOS transistors have been analyzed and measured, and the matching results have been verified by measurements and calculations on several basic circuits.
Journal ArticleDOI
Characterisation and modeling of mismatch in MOS transistors for precision analog design
TL;DR: In this paper, a characterization methodology is presented that accurately predicts the mismatch in drain current over a wide operating range using a minimum set of measured data and the physical causes of mismatch are discussed in detail for both p- and n-channel devices.
Journal ArticleDOI
Statistical modeling of device mismatch for analog MOS integrated circuits
TL;DR: A generalized parameter-level statistical model, called statistical MOS (SMOS), capable of generating statistically significant model decks from intra- and inter-die parameter statistics is described, and Calculated model decks preserve the inherent correlations between model parameters while accounting for the dependence of parameter variance on device separation distance and device area.