scispace - formally typeset
Journal ArticleDOI

Watt-Level, Direct RF Modulation in CMOS SOI With Pulse-Encoded Transitions for Adjacent Channel Leakage Reduction

TLDR
In this article, a pulse-encoded transition (PET) technique is introduced to reduce undesired harmonic distortion (HD) and adjacent channel leakage ratio (ACLR) generated by the direct RF modulation.
Abstract
This article reports signal processing and circuit techniques for direct RF signal modulation. A pulse-encoded transition (PET) technique is introduced to reduce undesired harmonic distortion (HD) and adjacent channel leakage ratio (ACLR) generated by the direct RF modulation. To enable PET RF switching, two variations of a high-power, stacked-FET switch modulator, an 8- and 12-device stack, are designed in 45-nm silicon on insulator (SOI) CMOS. The switch design uses a tapering design to significantly improve power handling with minimal impact to switching speed. The modulators have $P_{1\,{\mathrm{ dB}}} $ values between 34 and 39 dBm while demonstrating a modulation bandwidth of nearly 500 MHz with a 1-GHz carrier. The input referred third order intercept point (IIP3) is between 46 and 61 dBm. Additionally, ACLR measurements of up to −50 dBc are demonstrated using the proposed PET technique at 30-dBm output power. To the best of our knowledge, this is record power handling and ACLR for a CMOS switch.

read more

Citations
More filters
Journal ArticleDOI

A Reconfigurable Spectrum-Compressing Receiver for Non-Contiguous Carrier Aggregation in CMOS SOI

TL;DR: A signal processing technique for receiving non-contiguous RF channels by concurrently mixing several RF bands to adjacent IF channels is demonstrated, which does not require local oscillator tuning and the proposed receiver (RX) can switch channels in less than 25 ns.
Journal ArticleDOI

A Code-Domain, In-Band, Full-Duplex Wireless Communication Link With Greater Than 100-dB Rejection

TL;DR: This article presents a CMOS-based, code-domain (CD), full-duplex (FD) transceiver operating in a link at 1 GHz that rejects in-band transmitter self-interference (TX SI) by more than 100 dB through a combination of pseudo-noise (PN) code orthogonality, circulator, and digital cancellation algorithms.
Journal ArticleDOI

Broadband, High-Linearity Switches for Millimeter-Wave Mixers Using Scaled SOI CMOS

TL;DR: In this paper , a theoretical analysis and design framework has been developed and verified through simulation and measurement through two broadband, high-linearity passive mixer designs, one optimized for linearity and the other for bandwidth, using a 45-nm SOI CMOS process.

Broadband, High-Linearity Switches for Millimeter-Wave Mixers Using Scaled SOI CMOS

TL;DR: New circuit techniques in distributed-stacked-complimentary (DiSCo) switches that enable picosecond switching speed in RF CMOS SOI switches are demonstrated that exceed prior SOI RF and microwave mixer performance by more than an order of magnitude.
References
More filters
Book

Understanding Delta-Sigma Data Converters

TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Journal ArticleDOI

Single-Sideband Transmission by Envelope Elimination and Restoration

TL;DR: In this article, a new type of single-sideband transmitter is described, which does not require the use of linear radio-frequency amplifiers, and is especially suitable for high-power operation.
Journal ArticleDOI

A 1.75 GHz highly-integrated narrow-band CMOS transmitter with harmonic-rejection mixers

TL;DR: In this paper, a highly integrated 175 GHz 035/spl µ/m CMOS transmitter is described, which facilitates integration through the use of a unique mixer, termed a harmonic-rejection mixer, and a wide loop bandwidth phase-locked loop (PLL) for the RF synthesizer.
Journal ArticleDOI

A Methodology for Realizing High Efficiency Class-J in a Linear and Broadband PA

TL;DR: In this article, the design and implementation of a class-J mode RF power amplifier is described, and the experimental results indicate the potential in achieving high efficiency across extensive bandwidth, while maintaining predistortable levels of linearity.
Related Papers (5)