scispace - formally typeset
Search or ask a question

Showing papers on "Equivalent series resistance published in 1985"


Journal ArticleDOI
TL;DR: In this paper, the currentvoltage characteristics of Schottky barrier diodes with series resistance were investigated and it was shown that by using Norde's function F(V)=V/2−(kT/q)ln(I/SAT2) at two different temperatures, barrier height, n−value or ideality factor, and series resistance can be determined even in the case 1
Abstract: The current‐voltage characteristics for Schottky barrier diodes with series resistance are discussed. It is shown that by using Norde’s function F(V)=V/2−(kT/q)ln(I/SAT2) at two different temperatures, barrier height, n‐value or ideality factor, and series resistance can be determined even in the case 1

153 citations


Journal ArticleDOI
TL;DR: In this paper, an extension of Norde's forward I-V plot is presented, which allows reliable values for three different parameters (n, R, and Is) in nonideal Schottky barrier diodes with high series resistance.
Abstract: In this work we present an extension of Norde’s forward I‐V plot. This modified method allows us to obtain reliable values for three different parameters (n, R, and Is) in nonideal Schottky barrier diodes with high series resistance.

78 citations


Journal ArticleDOI
TL;DR: In this paper, the ion sheath thickness was measured in an O2 discharge for 7-53 Pa pressure and 50-800 W rf power (13.56 MHz) and it was concluded that the discharge can be described as a capacitance with both a parallel and series resistance, the series element being the more important one.
Abstract: rf impedance, dc self‐bias, and ion sheath (dark space) thicknesses are measured in an O2 discharge for 7–53 Pa pressure and 50–800 W rf power (13.56 MHz). Special attention is paid to corrections for reactor stray impedances. It is concluded that the discharge can be described as a capacitance (the ion sheath) with both a parallel and a series resistance, the series element being the more important one. Good agreement is found between optical and electrical measurements of the ion sheath thickness. Evidence is presented that the dc potential difference between plasma and ground and rf electrode can be estimated with reasonable accuracy from the dc self‐bias and the optical dark space thicknesses. Positive ion acceleration in the ion sheath and electron‐neutral collisions in the bulk of the plasma glow account for only part of the total rf power transfer. It is suggested that significant dissipation takes place near the glow‐sheath boundary, although a quantitative description cannot be given yet.

55 citations


Journal ArticleDOI
J.M.C. Stork1, M. Arienzo, C.Y. Wong
TL;DR: In this article, the diffusion of As from polysilicon into boron-implanted single-crystal silicon through different interfaces obtained with different surface preparation techniques prior to poly-silicon deposition is studied.
Abstract: The diffusion of As from polysilicon into boron-implanted single-crystal silicon through different interfaces obtained with different surface preparation techniques prior to polysilicon deposition is studied. The impurity profiles have been analyzed by SIMS and C-V measurements and ESCA has been used to determine the structural properties of the interface. Electrical measurements on diodes have been performed to study the diode characteristics and the electrical interface resistance. The diffusion through chemically grown oxide layers is found to be strongly retarded with respect to "oxygen-free" interfaces. A strong correlation appears to exist between the diffusive and electrical barrier properties of such interfaces. For increasing oxygen content at the interface, the minimum diffusion cycle required to obtain good diode ideality factors is higher as is the electrical interface resistance. We have observed an order of magnitude increase in the contact resistance for annealing temperatures between 800° and 900°C. One of the major conclusions is that the necessity to go to higher temperatures to decrease the series resistance of the polysilicon contacts in the case of chemically grown interface oxides is compromising their use in high-performance VLSI technologies.

43 citations


Patent
19 Aug 1985
TL;DR: In this article, a high power single spatial mode semiconductor laser provides strong lateral index guiding to maintain single transverse mode output and yet has a large cavity area, which provides low series resistance, low thermal resistance, and lower operating current densities and photon densities.
Abstract: A high power single spatial mode semiconductor laser provides strong lateral index guiding to maintain single transverse mode output and yet has a large cavity area. The large cavity area provides low series resistance, low thermal resistance, and lower operating current densities and photon densities than can be achieved by conventional cavity designs. The result is a laser which can operate at high output power at a single transverse mode. In the plane of the p-n junction, the active layer has a cross-section including a waveguide section of width between 1-2 microns which provides lateral mode stability and discrimination against high order transverse modes with a directly adjacent amplifier section consisting of a layer of about 5-20 microns width and several hundred microns in length. Due to the large cross section area of the amplifier section, the majority of the current flows through the amplifier section where most of the heat is generated. The device has only a few ohms series resistance and significantly lower thermal impedances than conventional narrow cavity design.

37 citations


Patent
22 May 1985
TL;DR: In this article, a series resistance circuit consisting of N number of resistors R 2 1 ǫ R 2 n each having a resistance value R connected in series between an output terminal V o and one side of a terminal resistor R o which is connected on its other side to ground is described.
Abstract: A multiple function type D/A converter utilizing a ladder type resistance circuit, and capable of other mathematical functions in addition to the D/A conversion, having a series resistance circuit consisting of N number of resistors R2 1 ˜R2 n each having a resistance value R connected in series between an output terminal V o and one side of a terminal resistor R o which has a resistance value 2R and is connected on its other side to ground, such series circuit including a resistor connecting point between each adjacent pair of resistors R 0 , R2 1 ˜R2 N , and branching in parallel therefrom N+1 number of groups of parallel resistors 01˜0n, 11˜1n, . . . N1˜Nn, each containing n resistors where n is an integer greater than 1, the n resistors of each such group being all connected on one side to the same resistor connecting point with different groups thereof connected to different connecting points along such series circuit, the n resistors of each such group being individually switchable on the other side thereof alternately between ground and a reference voltage V s by means of corresponding groups of switching circuits S 01 ˜S 0n . . . S N1 ˜S Nn under the control of applied digital signals.

33 citations


Journal ArticleDOI
TL;DR: In this paper, it was shown that P-implantation forming n+regions followed by post-metallization annealing (PMA) at a moderate temperature of 200°C is very efficient in reducing the resistance of the Al contacts to negligibly small values.
Abstract: Amorphous silicon thin-film field-effect transistors have been made with a staggered electrode structure. In this structure we distinguish two separate contributions to the total contact resistance, namely, the Al/a-Si:H barrier itself and the bulk resistance of the underlying a-Si:H layer. Concerning the first contribution it was found that a P-implantation forming n+regions followed by post-metallization annealing (PMA) at a moderate temperature of 200°C is very efficient in reducing the resistance of the Al contacts to negligibly small values. The second contribution, i.e., the bulk resistance, implies a variable series resistance in field-effect (FE) measurements. Thin-film transistors (TFT's) with different gate lengths were used for the first time to determine this residual series resistance R res .

31 citations


Journal ArticleDOI
TL;DR: In this paper, mesa etching was used for sectioning cells on a diffused wafer to achieve an active area conversion efficiency of 20.1% under AM1.5 illumination.
Abstract: Homojunction InP solar cells with a high conversion efficiency of 18.0% have been fabricated using thermal diffusion of sulphur into p‐type InP. An open‐circuit voltage Voc as high as 0.837 V which resulted from a reduction in leakage current was attained by employing mesa etching as a method for sectioning cells on a diffused wafer. Fill factor was also increased to 82.9% owing to both a small diode ideality factor (≲1.3) and a low cell series resistance (≲0.5 Ω cm2). As a result of the improvement in these factors, a conversion efficiency as high as 18.0% (an active‐area conversion efficiency of 20.1%) under AM1.5 illumination was obtained. A phenomenon whereby shunt resistance in a mesa‐etched cell is reduced by illumination is discussed. This is due to the additional current flowing from the peripheral p‐InP region bared by the mesa etching.

24 citations


Journal ArticleDOI
04 Jun 1985
TL;DR: In this paper, a 30 GHz monolithic low-noise balanced mixer is described using an integrated bow-tie antenna to waveguide transition and low parasitic Mott diodes.
Abstract: This paper will describe a 30-GHz monolithic low-noise balanced mixer which has been developed using an integrated bow-tie antenna to waveguide transition and low parasitic Mott diodes. The diodes and mixer circuit were developed using MBE material and were fabricated using a plated airbridge technology. Measurements on the diode at dc and RF showed that the zero bias junction capacitance was 0.025 pF and the series resistance was 10 Omega. A mixer conversion loss of 6 dB was measured at 30 GHz with an IF of 1 GHz.

22 citations


Patent
09 Jan 1985
TL;DR: In this article, a circuit for measurement of the conductance of an electrolyte cell is disclosed, which features compensation for nonlinearities produced by resistance in series with the resistance of the cell and for non-linearities caused by polarization of a cell due to chemical, kinetic or other effects within the cell.
Abstract: A circuit for measurement of the conductance of an electrolyte cell is disclosed which features compensation for non-linearities produced by resistance in series with the resistance of the cell and for non-linearities caused by polarization of the cell due to chemical, kinetic or other effects within the cell. The cell is driven by an AC signal, and the circuit features a feedback loop in which a portion of the AC output signal is fed back for compensation of the series resistance and in which an op-amp generates a compensating DC voltage, both of which are summed with the AC excitation signal prior to its being supplied to the cell.

19 citations


Journal ArticleDOI
TL;DR: In this article, a linear negative resistance (LR) circuit with linear negative resistances is presented, and the value of the resistance can be easily controlled by an independent dc voltage source.
Abstract: A circuit which exhibits linear negative resistance characteristics is presented. Moreover, the value of the resistance is easily controlled by an independent dc voltage source. Experimental results are given.

Patent
24 May 1985
TL;DR: In this paper, a semiconductor device component, and process for preparation thereof, wherein current flowing in a vertical channel of semiconductor material is controlled by metallic gates laterally disposed on either side of the channel, is presented.
Abstract: A semiconductor device component, and process for preparation thereof, wherein current flowing in a vertical channel of semiconductor material is controlled by metallic gates laterally disposed on either side of the channel. Insulator layers are positioned overlying and underlying each gate, to reduce parasitic capacitance which would otherwise be present if the metallic gate material were in contact with overlying and underlying semiconductor material. Reduction of the capacitance allows the use of wider gate strips, thereby reducing the series resistance to an external gate contact. These changes significantly improve the high-power, high-frequency performance of the device component, as compared with permeable base transistors.

Journal ArticleDOI
TL;DR: In this paper, a simple but general model for explaining the series resistance dependence of transconductance and field effect mobility is developed, which enables a quantitative analysis of series resistance effects on the maximum mobility and the corresponding gate voltage, has been successfully tested on short channel MOSFETs with various channel lengths and external series resistances.
Abstract: A simple but general model for explaining the series resistance dependence of transconductance and field-effect mobility is developed in the letter. This model, which enables a quantitative analysis of series resistance effects on the maximum mobility and the corresponding gate voltage, has been successfully tested on short-channel MOSFETs with various channel lengths and external series resistances.

Patent
19 Jul 1985
TL;DR: In this article, the first conductivity type clad layer at a mesa stripe section is made of crystal of high carrier concentration, and a crystal layer of low carrier concentration can be independently arranged at the section of the buried layer.
Abstract: PURPOSE:To inhibit the transistor action or the thyristor action of a buried layer while the increase in series resistance of an element is inhibited by a method wherein the first conductivity type clad layer at a mesa stripe section is made of crystal of high carrier concentration, and a crystal layer of low carrier concentration can be independently arranged at the section of the buried layer CONSTITUTION:An n type InP intermediate layer 11 and an n type InP clad layer 12 are used instead of the section of a clad layer in the conventional example This construction enables the transistor action or the thyristor action in the buried layer to be inhibited likewise to conventional because the buried layer region is provided with an n type InP layer in spite of the low resistance of the n type InP 12 at the mesa stripe section The resistance value in the narrow region of the layer 12 reduces to about 1/2 of the resistance in the conventional n-InP clad layer This shows the extra power consumption (or heat generation) in the conventional n type InP clad layer reduces to one half, and then the improvement of temperature characteristic of the element or the decrease in efficiency due to heat can be inhibited

Journal ArticleDOI
S. Chaudhuri1, M.B. Das
TL;DR: In this article, the transport equations applicable to forward biased Schottky barriers or junction-gate FET's with open-circuit drain have been solved for dc and small-signal ac currentvoltage characteristics, treating the system as a distributed diode/resistance network.
Abstract: Transport equations applicable to forward biased Schottky barriers or junction-gate FET's with open-circuit drain have been solved for dc and small-signal ac current-voltage characteristics, treating the system as a distributed diode/resistance network. Universal graphs have been presented that show the dependence of the MESFET three terminal resistances on the forward diode current. Series resistances of test MESFET's, with a wide range of gate-length values, have been experimentally evaluated after allowing for the channel distributed resistance effects. These results indicate that free surface depletion in the electrode gap regions have significant effects on the FET series resistance components.

Journal ArticleDOI
TL;DR: In this paper, the 2D electron-gas carrier mobiliy in 1µm gate-length modulation-doped FET's has been determined as a function of the gate bias voltage.
Abstract: Two-dimensional (2-D) electron-gas carrier mobiliy in 1µm gate-length modulation-doped FET's has been determined as a function of the gate bias voltage. The measurement technique utilizes a small-signal gate voltage excitation and probes the true channel conductance by directly eliminating the source and drain series resistance effects. The mobility is extracted by combining the channel conductance data with the CV data and its variation with gate bias voltage is indicative of the variation of the effectiveness of screening of the ionized impurities and the quality of the MBE-grown GaAs buffer layer.

Journal ArticleDOI
U.K. Mishra1, S.C. Palmateer1, S.J. Nightingale1, M.A.G. Upton1, P.M. Smith1 
TL;DR: In this article, the design and fabrication of a novel air-bridged, lowparasitic Mott diode was described, which was fabricated on epitaxial layers grown by MBE on SI undoped LEC substrates.
Abstract: The design and fabrication of a novel air-bridged, low-parasitic Mott diode is described. The devices were fabricated on epitaxial layers grown by MBE on SI undoped LEC substrates. Measurements on the diode at DC and RF showed that the zero bias capacitance was 0.025 pF, the parasitic capacitance 0.007 pF and the series resistance was approximately 10 ?. Diode pairs were incorporated into monolithic single balanced mixers which exhibited a conversion loss of 6 dB at 30 GHz with a 1 GHz IF.

Journal ArticleDOI
TL;DR: In this paper, rectifying CuInSe2/Au contacts were prepared by a vacuum evaporation of Au on n-type sintered CuSe2 samples in order to evaluate the electrooptical properties of these devices.
Abstract: Rectifying CuInSe2/Au contacts were prepared by a vacuum evaporation of Au on n‐type sintered CuInSe2 samples in order to evaluate the electro‐optical properties of these devices. The low photovoltaic efficiency of the diode is due to the presence of the insulating layer, surface states, and high series resistance. A good quantum efficiency of about 60% in the 0.72–1.24‐μm range has been obtained.

Patent
23 Sep 1985
TL;DR: In this article, a thin low-doped p-InP layer and a thicker highly doped InP layer were introduced to maintain good optical characteristics and series resistance, thereby resulting in operable devices having significantly increased operating currents and higher output power than those of the prior art.
Abstract: In conventional InGaAsP/InP semiconductor lasers the p-doping in the InP laser level cannot be increased above 1×1018 atoms/cm3 without adversely affecting the optical characteristics of the devices. However, by introducing a thin low-doped p-InP layer and a thicker highly doped InP layer, good optical characteristics can be maintained and series resistance can be reduced by a factor of 2 to 4, thereby resulting in operable devices having significantly increased operating currents and higher output power than those of the prior art.

Proceedings ArticleDOI
01 Oct 1985
TL;DR: In this article, the authors discussed methods for a more accurate determination of Schottky diode ideality factor n and series resistance Rs from I-V measurements and compared the difference given by different approaches.
Abstract: Methods are discussed for a more accurate determination of Schottky diode ideality factor n and series resistance Rs from I-V measurements. Values of R for various millimeter wave Schottky-barrier diodes are given to demonstrate the difference given by different approaches.

Proceedings Article
01 Jan 1985
TL;DR: In this article, a planar whiskerless Schottky diode was used for radio astronomy applications at 100-300 GHz, where the anode and ohmic contacts were on the same side of the device, and proton bombardment was used to establish the divided surface (by making some regions of the GaAs wafer semiinsulating) prior to definition of a B-doped SiO2 finger, anode formation, and anode contact metallization.
Abstract: Design considerations, fabrication techniques, and performance predictions are presented for a planar whiskerless Schottky diode to be used (in radio astronomy applications) at 100-300 GHz. The anode and ohmic contacts are on the same side of the device, and proton bombardment is used to establish the divided surface (by making some regions of the GaAs wafer semiinsulating) prior to definition of a B-doped SiO2 finger, ohmic contacting, anode formation, and anode contact metallization (all using photolithographic techniques). The contributions of parasitic elements are calculated for a device with a 3.5-micron-deep n(+) layer doped at 2 x 10 to the 18th/cu cm, a 250-nm-thick epitaxial layer doped at 5 x 10 to the 16th/cu cm, and a 1-micron-radius anode (providing zero-bias junction capacitance 7 fE). It is predicted that such a device would have total series resistance 12.58 ohm and total shunt capacitance 1.37 fF, compared with 14.27 ohm and 0.93 fF for the corresponding whiskered device.

Journal ArticleDOI
TL;DR: In this article, a minature clip-on probe was developed to facilitate measurements of components mounted on printed circuit boards and a compact impedance comparator was constructed which measured in-circuit components within approximately 2 to 4-percent accuracy over the following ranges: for resistance, 1.5? to 1 M?; for capacitance, 100 pF to 60 pF; and for inductance, 400?H to 60 H.
Abstract: A novel approach to in-circuit measurement of resistors, capacitors, and inductors was evolved. This approach utilizes current sensing, making possible the measurement of in-circuit components which may be directly shunted by impedances as much as two to three orders of magnitude lower in impedance than the unknown. A minature clip-on probe was developed to facilitate measurements of components mounted on printed circuit boards. A compact impedance comparator was constructed which measured in-circuit components within approximately 2 to 4-percent accuracy over the following ranges: for resistance, 1.5 ? to 1 M?; for capacitance, 100 pF to 60 ?F; and for inductance, 400 ?H to 60 H. Impedances as low as one to three orders of magnitude smaller than the measured element impedance, depending on the probe used, shunted the unknown when the stated accuracy was measured. Much of the quoted inaccuracy is due to the ±3-percent resistance and ±0.1-percent linearity tolerances of the reference resistor which was used for all measurements.

Journal ArticleDOI
TL;DR: In this article, the authors investigated circuit design conditions of Schottky diodes and the fabrication method for dioded suitable for the conditions has been proposed for applications to bipolar LSI's.
Abstract: Circuit design conditions of Schottky diodes have been investigated and the fabrication method for diodes suitable for the conditions has been proposed for applications to bipolar LSI's, such as ECL RAM and Schottky TTL. It has been found that the desired Schottky diode for bipolar LSI's is not an ideal device from the theoretical point of view. Desired built-in voltage, ideal factor, series resistance, and junction capacitance for the Schottky diode have been estimated, respectively, for the bipolar RAM and Schottky TTL. A proposed Schottky diode consists of an impurity-concentration-controlled

Journal ArticleDOI
TL;DR: In this paper, a modified gyrator circuit is presented, in which the equivalent series resistance can be totally eliminated by simulation of a series negative resistance of equal value in the Gyrator, resulting in a very high value of Q.
Abstract: Numerous circuits have been developed in the past for simulating inductors, using operational amplifiers and other passive components. Although some of these circuits can be shown to have ideally infinite Q factors, in practice the value may be limited by various stray and non-ideal effects. This note presents a modified gyrator circuit, in which the equivalent series resistance can be totally eliminated by simulation of a series negative resistance of equal value in the gyrator, resulting in a very high value of Q.

Journal ArticleDOI
TL;DR: In this paper, the effect of series resistor in the measuring circuit has been studied in detail, showing that the current/voltage characteristic exhibits threshold, negative resistance and memory and the current is time-dependent.
Abstract: Variation of the circulating current with potential difference has been studied in evaporated Al-Cu/SiO-Al sandwich structures, 200 nm thick containing 10wt% Cu. The effect of a series resistor in the measuring circuit has been studied in detail. Low-voltage switching, low-voltage narrow-peak current pulses, bistable high-voltage switching and self-sustained oscillations in the circulating current have been obtained using different values of the series resistor. The results are explained through an analysis of the DC load line of the measuring circuit. In the absence of a series resistor, the current/voltage characteristic exhibits threshold, negative resistance and memory and the current is time-dependent.

Patent
29 Aug 1985
TL;DR: In this article, two field effect transistors (FETs) are used to set the titled resistor easily to an objective resistance value with external control by utilizing two FETs.
Abstract: PURPOSE:To set the titled resistor easily to an objective resistance value with external control by utilizing two field effect transistors (FETs). CONSTITUTION:When a control signl Vc is applied between a control signal input terminal 3 and the 2nd power terminal 2, an output of a differential amplifier 7 applies a voltage where a drain voltage of an FET6 is erual to the control signal Vc to a gate of the FET6. In adopting the FET6 having a peoper current gain beta in this case, it is possible to locate the operating point of the FET6 to a region II' in the figure and the equivalent resistance is regarded as a resistance expressed in an equation I . Since a drain-source voltage of the FET6 is the Vc and a current flowing to the FET6 is a current IB decided by a constant current source 5, an R6 is expressed in an equation II. Similarly an FET8 is equivalent to a resistance expressed in an equation III. When the matching between a threshold voltage VT6 of the FET6 and a threshold voltage VT8 of the FET8 is excellent and the FETs having nearly equal value are selected, the equation III is expressed by utilizing the equations II and I . Thus, a control signal input terminal 4 and the 2nd power terminal 2 act as a variable resistor having a value proportional to the control signal Vc expressed in an equation IV.

Journal ArticleDOI
TL;DR: In this paper, the width dependence of hot-electron currents in MOSFET's fabricated with LOCOS, non-LOCOS, and a modified LOCOS process is studied.
Abstract: Width dependence of hot-electron currents in MOSFET's fabricated with LOCOS, non-LOCOS, and a modified LOCOS processes are studied. The experimental results show that the substrate and gate currents are apparently enhanced in narrow width devices. The enhancement, however, is due to different voltage drops across the source-drain series resistance. The voltage drops are usually larger in wider devices. After correcting for the resistance effect, the substrate and gate currents scale with the device width. With this typical LOCOS process, the bird's beak and in-diffusion of field implant dopants do not cause excess hot-electron activities along the channel/field edges as has been suspected. Some other LOCOS process could, of course, produce a different result. Studies using wide test devices must consider the series resistance effect. With this precaution taken, models derived from wide-channel data will be applicable to narrow-channel devices, at least for some processes.

Journal ArticleDOI
TL;DR: In this article, the role of sheet and contact in affecting the performance of edge contact transistors is investigated and a two-dimensional model has been developed to calculate the transistor's effective series resistance at various bias conditions.
Abstract: Edge contact transistors are widely used in basic cells of gate-array circuits and custom designed circuits. The role of sheet and contact in affecting the performance of these transistors is investigated. A two-dimensional model has been developed to calculate the transistor's effective series resistance at various bias conditions. Very good correlation between the model and experiments has been obtained. It is found that different series resistances are observed in linear and saturation regions for edge contacts transistors in contrast to the conventional transistors. The results show that the effective series resistance of an edge contact transistor is nonuniform and is a complex function of the gate voltage, the drain voltage, and the linear or saturation bias conditions.

Journal ArticleDOI
Jerzy Kanicki1
TL;DR: In this paper, the minority-carrier injection and series resistance effects on the electrical properties of a-Si:H Schottky barrier diodes are described and their effect on capacitance-voltage characteristics are discussed.
Abstract: The minority-carrier injection and series resistance effects on the electrical properties of a-Si:H Schottky barrier diodes are described. The conductivity modulation was observed, for the first time, in metal/HOMOCVD a-Si:H contacts. Its effect on capacitance-voltage characteristics are discussed. The minority-carrier injection ratio is estimated from current-voltage characteristics as a function of total forward current for different metals. It is shown that these effects cannot be neglected in the interpretation of the AC and DC measurements. The caution, therefore, must be taken when using a-Si:H diodes structures to obtain the fundamental physical parameters characterizing either the interface or bulk properties of amorphous semiconductors.

Patent
30 Aug 1985
TL;DR: In this article, the authors propose to set a desired resistance value with high accuracy regardless of characteristic parameters (beta0, W/L, etc.), by using an MOS transistor as an equivalent resistance.
Abstract: PURPOSE:To set a desired resistance value with high accuracy regardless of characteristic parameters (beta0, W/L, etc.), by using an MOS transistor as an equivalent resistance. CONSTITUTION:Insulated gate type field effect transistors MOSFETQ1 and Q2 are constituted with the same conditions with substantially equal characteristic parameters (W/L, beta0, etc.). Therefore the working point of the FETQ2 is set at a point P when the gate-source voltage VGS3 is applied to a gate. Therefore the resistance value of the FETQ1 is substantially equal to that of the FETQ2 when viewed from the drain, i.e., a point Z'. Then the equivalent resistance of the desired value can be obtained regardless of the characteristic parameters W/L, beta0, etc. of both FETQ1 and Q2 by setting properly a constant current I0 and the reference voltage VREF. Then the point P can be set optionally by controlling at least one of the voltage VREF and the current I0. As a result, it is possible to control the impedance, i.e., the equivalent to a desired level.