Showing papers on "Etching (microfabrication) published in 1984"

Comparison of XeF2 and F‐atom reactions with Si and SiO2

Abstract: Silicon gasification by XeF2 is compared with F‐atom etching under conditions typical of those used in plasma etching. Temperatures ranged from −17 to 360 °C and XeF2 pressures were between 0.05 and 2 Torr. Silicon etching by XeF2 shows a sharply different etch rate/temperature dependence than the Si/F or Si/F2 reaction systems; there is no detectable reaction between XeF2 and SiO2 in contrast to the F‐atom/SiO2 system. These data indicate that physisorption can limit silicon etching by XeF2 and show that basic studies which use XeF2 as a model compound for the etching of silicon and SiO2 by F atoms should be interpreted with caution.

Anisotropic etching of SiO2 in low‐frequency CF4/O2 and NF3/Ar plasmas

Abstract: Anisotropic etching of SiO2 films is reported in low frequency (∼100 kHz), moderate‐pressure (0.35 Torr) CF4/O2 and NF3/Ar plasmas. Rates up to 2000 A/min were achieved with high selectivity over GaAs and InP substrates. The etching mechanism was studied with optical spectroscopy and downstream chemical titrations. Anisotropy is attributed to ion‐enhanced reactivity of fluorine atoms with SiO2 at rates up to two hundred times larger than purely chemical etching by fluorine atoms. Damage and product sputter desorption models of this process were evaluated. These two models are nearly mathematically equivalent at steady state, and show that the effectiveness of ions in etching by enhanced reaction is roughly 15 times that in physical sputtering under these conditions.

Plasmaless dry etching of silicon with fluorine‐containing compounds

Abstract: Silicon is rapidly etched by the gas‐phase halogen fluorides ClF3, BrF3, BrF5, and IF5, in analogy to XeF2 etching silicon. Nearly complete selectivity over SiO2 is achieved in all cases. By contrast, ClF and Groups III and V fluorides such as NF3, BF3, PF3, and PF5 do not spontaneously etch either Si or SiO2 under the same experimental conditions. These relatively inexpensive interhalogens can be applied to pattern silicon and more generally to remove silicon or polysilicon layers without a plasma. Low‐temperature plasmaless gasification of substrates by these fluorine‐containing interhalogens is an economically attractive alternative to fluorine‐based plasma etching.

Computer simulation of a CF4 plasma etching silicon

Abstract: A CF4 plasma etching silicon has been simulated to identify dominant chemical processes and to quantify the effects of various reaction and transport parameters. The model was a one‐dimensional plug‐flow reactor in which a packet of gas is followed through the plasma and into the afterglow region, allowing the simulation to be performed as an initial value problem in ordinary differential equations. Two temperature zones were used with all known significant reactions incorporated into the chemical mechanism with the best available rate constants. Adjustable parameters were included only for certain sticking coefficients, surface recombination rates, and surface polymerization rates. Appropriate adjustment of these parameters gives satisfactory agreement between the simulations and experimental measurements of downstream gas‐phase composition. The model unambiguously shows that fluorine atoms are the main reactive species in the plasma, that gas phase chemistry is clearly dominated by neutral reactions, an...

Laser interferometer system and method for monitoring and controlling IC processing

Abstract: A laser interferometer system and associated method for etching endpoint detection, and for monitoring etching or growth to a selected depth. The process implemented by the system involves scanning the laser beam across scribe lines on a wafer which is undergoing fabrication (growth or etching) and monitoring the resulting interference pattern. Alternatively, the process implemented by this system involves moving the laser beam across the scribe line to detect the position of the scribe line; locking the laser beam on the scribe line; and monitoring the resulting interference pattern.

Plasma processor and method for IC fabrication

Abstract: A plasma processor, for dry etching during a fabricating process for an integrated circuit semiconductor device, including a plasma generating region formed in a waveguide into which microwave power is transmitted. An etchant gas is introduced into the plasma generating region and a plasma is generated. The plasma generating region and a reacting region are kept at a specific gas pressure differential by an evacuating device. The radicals (active etching species) react with the underside of a turned wafer placed on a base plate in the reacting region because the gas is blown against the underside of the wafer by the pressure differential. In particular, the wafer is etched by etchant gases floating the wafer by blowing the gases out of holes in the base plate. The floating wafer processing method provides a higher processing rate and better etching uniformity.

Tungsten Etching in CF 4 and SF 6 Discharges

Abstract: Usinage par plasma par des decharges dans des composes fluores en presence d'oxygene. Influence de l'oxygene sur la vitesse d'attaque. Application a la fabrication de VLSI

Method for manufacturing semiconductor device

Abstract: A method for manufacturing a semiconductor device, capable of forming, with good controllability, impurity regions of a low impurity concentration, includes the steps of: forming a gate electrode on a surface of a semiconductor substrate through a gate oxide film; forming a first film on the surfaces of the gate electrode and the semiconductor substrate; forming a non-single-crystalline silicon film to cover the entire surface; forming a second film to cover the entire surface; performing anisotropic etching of the second film to form residual second films on the side walls of that step portion non-single-crystalline silicon film which is formed corresponding to a shape of the gate electrode; performing etching of the non-single-crystalline silicon film by using the residual second films as masks to form residual non-single-crystalline silicon films on the side walls of the gate electrode through the first film; ion-implanting an impurity having a conductivity type opposite to that of the semiconductor substrate by using as masks the gate electrode and the residual non-single-crystalline silicon films; removing the residual non-single-crystalline silicon films; and annealing a resultant structure to activate the impurity so as to form source and drain regions each of which comprises an impurity region of a high impurity concentration and an impurity region of a low impurity concentration which is adjacent to the impurity region of the high impurity concentration and which is located under a structure area corresponding to one of the removed non-single-crystalline silicon films.

Method for growing monocrystalline silicon through mask layer

Abstract: A monocrystalline silicon layer is formed on a mask layer on a semiconductor substrate. An apertured mask layer is disposed on the substrate, and an epitaxial layer is then grown by a two-step deposition/etching cycle. By repeating the deposition/etching cycle a predetermined number of times, monocrystalline silicon will be grown from the substrate surface, through the mask aperture, and over the mask layer.

High resolution, high efficiency I.R. LED printing array fabrication method

Abstract: An IR LED array and method of fabrication having a GaAs wafer with one surface metallized to form a common LED contact. Epitaxially formed on this wafer is a GaAs/GaAlAs heterostructure with successive layers of Ga 1-x Al x As-n, GaAs-p, and Ga 1-y Al y As-p on the other surface, followed by an electrical contact layer of GaAs-p+ and an insulating layer of SiO 2 , discrete areas of the contact and insulating layers being removed by etching to form viewing windows for the individual LEDs, and with the area of the contact layer bordering the viewing windows being exposed and metallized to provide individual LED electrical contacts. In a second embodiment, the GaAs-p+ layer is dispensed with and the transparent electrically conducting coating is applied directly on both the insulating layer bordering the Ga 1-y Al y As viewing windows and over the viewing windows. In a third embodiment, and edge emitting LED variant is provided and in a fourth embodiment, various light barrier designs are proposed for preventing optical crosstalk between the individual LEDs.

Study of silicon contamination and near‐surface damage caused by CF4/H2 reactive ion etching

Abstract: Silicon surfaces which had been exposed to a CF4 /H2 plasma have been characterized by x‐ray photoelectron spectroscopy, ellipsometry, He ion channeling, and H profiling techniques. Plasma exposure leads to the deposition of a thin (∼30 A thick) C,F‐polymeric layer. Hydrogen and/or damage (displaced Si atoms) can be detected in the near‐surface region up to a depth in excess of 400 A from the Si surface.

Laser/plasma chemical processing of substrates

Abstract: A process for the modification of substrate surfaces is described, wherein etching or deposition at a surface occurs only in the presence of both reactive species and a directed beam of coherent light.

Fabrication of 80 Å metal wires

Abstract: Some years ago Possin reported the fabrication of wires as small as 400 A in diameter with a method involving electroplating into etched particle tracks in mica. We have refined this technique, and can now use it to routinely produce wires as small as 80 A. These refinements are described, and the possibility of making even smaller wires with this method is discussed.

Manufacture of semiconductor device

Abstract: PURPOSE:To obtain a semiconductor device with improved high temperature characteristics by a method wherein when a groove is formed on the surface of a semiconductor substrate and a glass insulation layer is adhered to the inside of the groove and the edge of the aperture, zinc system glass is introduced as the glass and the glass layer is covered with a silicon nitride film and an electrode forming portion of the surface of the substrate is processed by surface treatment. CONSTITUTION:A groove 13 is formed on the surface of a semiconductor substrate 11 and an insulation material 14 made of Zn system glass is electrolytically adhered to a P-N junction 12 exposed in the inside wall of the groove 13 and to the circumference of the aperture. The material 14 is left on the SiO2 film 15 as small particles 16 but they will have no problem because they will be removed by the following selecting etching process. Then the substrate 11 is baked at the required temperature and the material 14 is turned to a glass layer 17 and an Si3N4 18 is formed on the film 15 and the glass layer 17. A photoresist film 19 is formed on the surface other than the region where the electrode is formed and the film 15, with small particles 16 adhered on it, is removed by etching.

Apparatus and method for high rate deposition and etching

Abstract: A system and methods for very high rate deposition and etching using a separate, substantially enclosed plasma generation chamber within a conventional semiconductor-processing vacuum chamber. A pressure differential is established between the chambers and a low frequency, high flux density, highly dissociated plasma is generated within the smaller internal chamber and projected by the pressure differential to a selected region of the processing chamber. The gas composition, flow rates, power and pressure are readily tailored to the particular etching or deposition process. In addition, the small internal chamber can be rotated and translated to expand the area of coverage. Etch rates of up to 60,000 angstroms per minute and useful quality dielectric film deposition rates of up to approximately 6,000 angstroms per minute have been achieved to date.

Reactive-ion etching method

Abstract: A reactive ion etching method utilizing high frequency voltage wherein cathode drop voltage developed in the vicinity of an electrode disposed for impressing a high frequency power is gradually reduced immediately before stopping the impression of high frequency power at the end of ion etching process, thereby reducing the voltage impressed on an insulation layer within a semiconductor wafer below the breakdown voltage of the insulation layer.

Argon‐ion assisted etching of silicon by molecular chlorine

Abstract: Argon‐ion assisted etching of silicon by molecular chlorine has been investigated. The masses and some kinetic energy distributions of the neutral particles emitted from the surface have been determined by mass spectrometry and time‐of‐flight spectra. It is found that an important part of the silicon‐containing particles consists of SiCl and SiCl2 molecules which have kinetic energies in the eV region. The observations exclude a simple evaporation of SiCl4 at the target temperature. A tentative model—consisting of a collision cascade like process parallel to thermal evaporation at the substrate temperature induced by a reduction of the effective surface binding energy during a sputtering event—is given to explain the observed kinetic energy distributions qualitatively.

Optical emission spectroscopy end point detection in plasma etching

Abstract: A method for etching a batch of semiconductor wafers to end point using optical emission spectroscopy is described. The method is applicable to any form of dry plasma etching which produces an emission species capable of being monitored. In a preferred embodiment, as well as a first alternative embodiment, a computer simulation is performed using an algorithm describing the concentration of the monitored etch species within the etching chamber as a function of time. The simulation produces a time period for continuing the etching process past a detected time while monitoring the intensity of emission of the etch species. In a second alternative embodiment, this latter time period is calculated using mathematical distributions describing the parameters of the etching process. In all three embodiments, the actual time that end point of an etching process is reached is closely approximated. In this manner, all wafers in a batch of wafers being etched reach end point while at the same time, the amount of over etching is greatly minimized.

Method for treating a surface with a microwave or UHF plasma and improved apparatus

Abstract: A method for etching or chemically treating a surface of an article utilizing a radio frequency wave ion generating apparatus which provides a thin disk shaped plasma is described. The plasma disks can have a relatively large diameter (on the order of magnitude 50 centimeters). The plasma disks can be created without using a static magnetic field. The radio frequency waves are preferably microwaves or UHF. The method is particularly useful for ion or free radical irradiation of the surface provided in the plasma or for irradiation of the surface by ions accelerated outside a cavity containing the plasma. Disk plasmas are created over a wide pressure range (10-4 Torr to 1 atmosphere) and are highly ionized at low pressures. An apparatus adapted for treating a surface of an article with ions from a plasma is also described. The method and apparatus are preferably used for treating a surface forming part of an integrated circuit.

Deep‐ultraviolet induced wet etching of GaAs

Abstract: We report on deep‐ultraviolet (UV), light‐assisted wet etching of GaAs. The etching chemistry differs from that using visible wavelengths and all doping types of GaAs can be efficiently etched. The UV processing offers rapid etching at low, nonthermal laser intensities and permits very deep, vertical features to be made.

Dry etching apparatus

Abstract: The invention is directed to a dry-etching apparatus used for etching an aluminum wiring film formed on a wafer, and more particularly to a dry-etching apparatus which can remove chlorides deposited on the surface of the wafer during the dry etching thereof, as well as an etching resist film, without having to take the wafer out. This dry-etching apparatus is provided with an etching chamber, a vacuum antechamber attached to the etching chamber by a gate valve, and a post-treatment chamber attached to the vacuum antechamber. The apparatus is so formed that etched wafers removed to the vacuum antechamber can be sent therefrom to the post-treatment chamber, and then the post-treated wafers can be removed to the vacuum antechamber again, and then removed therefrom to the atmosphere.

Two-step anisotropic etching process for patterning a layer without penetrating through an underlying thinner layer

Abstract: Patterning of a relatively thick silicon nitride layer coating a relatively thin silicon dioxide layer which coats a major surface of a silicon wafer is accomplished by reactive ion etching, without penetrating through the silicon dioxide layer to the major surface of the silicon wafer, by means of a two-step reactive ion etching procedure using a patterned masking layer. During the first etching step the silicon nitride layer is not completely penetrated; during the second step the nitride layer but not the silicon dioxide layer is completely penetrated. The gas mixture for the first etching step differs from that of the second etching step in accordance with prescription that the ratio of the etch rate of silicon dioxide to that of silicon nitride during the second step is significantly smaller than such ratio during the first step. Preferred gas mixtures are oxygen and CHF3 in the ratio of about 0.6 to 1.0 for the first etching step and about 9 to 1 for the second etching step. Other systems of layers and wafers can be similarly patterned by means of two-step etching processes using selections of the gas mixtures in accordance with this prescription for the ratios of etch rates.

Method of forming through holes by differential etching of stacked silicon oxynitride layers

Abstract: A process of manufacturing a semiconductor device by which a through hole such as contact hole with an obtuse opening edge can be formed in an insulation or passivation layer. At least two silicon oxynitride layers in which the nitrogen to oxygen ratio differs from each other are formed on a semiconductor substrate. The etching rate of the top layer is greater than that of the second layer from the top. The stacked silicon oxynitride layers are then selectively etched to form a through hole with an obtuse opening edge.

RF Coupling techniques

Abstract: An improved reactive ion plasma etching apparatus having an improved electrode, for holding the product, such as a semiconductor wafer, to be etched, provided with a plurality of apertures into which different tailored product holders are inserted so as to alter the plasma over each holder and provide more uniform etching of the product in the holder regardless of its position on the electrode.

Method for fabricating an integrated circuit with multi-layer wiring having opening for fuse

Abstract: A programmable integrated circuit has multi-layer wiring with openings over fuses, and a fabrication method forms the openings for each fuse, to avoid damage due to the blowing off of the fuses. The forming of the openings is performed by etching each insulating layer on the fuses after it is formed over the pre-formed wiring-layers. This results in shorter etching time as compared to the prior art etching method where the openings are etched in all the layers for the whole depth in one process step. Because of the shorter time necessary for each etching, overetching and side-etching are reduced, thus providing the openings with more accurately determined dimensions, which provides higher yield for manufacturing the device. The contact holes and the windows for the bonding pads in each insulating layer are etched in the same fabrication step for forming the openings for the fuses in the same insulating layer. This requires no additional fabrication processes for the IC and results in no increase of the fabrication time and cost.

Microwave materials and fabrication techniques

Abstract: Laminates and substrates metals microwave artwork etching techniques bonding techniques connectors and transistors microwave packaging appendices.

Process for fabricating semiconductor device

Abstract: A process is disclosed for fabricating semiconductor devices, and especially for fabricating semiconductor devices having multiple levels of metallization separated by polyimide or other organic materials. The process avoids the sputter etching and redeposition of the lower metal layer during reactive ion etching of openings through the organic layer. Sequential layers overlying the first layer of metallization include a layer of oxide, a layer of organic material, and a second layer of oxide. The second layer of oxide functions as a hard mask for patterning the organic material. The first layer of oxide acts as an etch stop and protective layer to prevent attack of the underlying metal during reactive ion etching of the organic layer. The first layer of oxide is of limited areal extent to avoid subsequent problems with the organic layer. The oxide located at the bottom of the opening through the organic material as well as the second layer of oxide and any oxide which is sputtered and redeposited on the walls of the opening through the organic material are easily removed in a single etch step without adversely affecting the underlying metallization. After removing the oxide, a second layer of metallization is applied and patterned as required.

Two‐photon laser‐induced fluorescence monitoring of O atoms in a plasma etching environment

Abstract: Atomic radicals are usually the most important reactants in plasma processing. For example, in dry etching or development of organic photoresists, O2 plasmas are used to generate O atoms which can etch the resist spontaneously. However, concentration measurements of these reactive atoms have been limited largely to indirect and often unverifiable methods such as emission spectroscopy, making process optimization difficult. We demonstrate the applicability of two‐photon laser‐induced fluorescence to monitor atom concentrations in situ by exciting O atoms at 226 nm and detecting fluorescence at 845 nm. A detection limit of <1013 atoms cm−3 is determined using downstream electron paramagnetic resonance spectroscopy. Noise from background plasma‐induced emission is eliminated by firing the laser at a time when the applied voltage crosses zero and the emission is extinguished. From the relative intensities of the O(2p4 3P) fine‐structure components, the plasma temperature is found to be thermalized with the am...