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Showing papers on "Resist published in 1995"


Journal ArticleDOI
TL;DR: In this paper, a negative tone photoresist, SU•8, was proposed for ultrathick layer applications, achieving an aspect ratio of 10:1 using near-ultraviolet lithography in a 200μm-thick layer.
Abstract: This article describes a new negative‐tone photoresist, SU‐8, for ultrathick layer applications. An aspect ratio of 10:1 has been achieved using near‐ultraviolet lithography in a 200‐μm‐thick layer. The use of this resist for building tall micromechanical structures by deep silicon reactive‐ion etching and electroplating is demonstrated. Using SU‐8 stencils, etched depths of ≳200 μm in Si and electroplated 130‐μm‐thick Au structures with near‐vertical sidewalls have been achieved.

445 citations


Patent
06 Jun 1995
TL;DR: In this article, a chemically amplified positive resist (CRS) was proposed, in which acid labile groups are incorporated into at least some of the hydrogen atoms on the carboxyl or phenolic hydroxyl groups so that the resin becomes insoluble or substantially insoluble in alkali.
Abstract: A chemically amplified positive resist composition contains as a base a carboxyl or phenolic hydroxyl group-containing resin soluble in aqueous alkaline solution, in which acid labile groups are incorporated into at least some of the hydrogen atoms on the carboxyl or phenolic hydroxyl groups so that the resin becomes insoluble or substantially insoluble in alkali, wherein the resin contains acid labile groups of at least two types, acid labile groups of one type are acetal or ketal groups, and acid labile groups of the other type are tertiary hydrocarbon groups or tertiary hydrocarbon group-containing substituents. The resist composition remains stable during vacuum standing after exposure to electron beams or soft x-rays, leaves minimal footings on chromium substrates, has an excellent sensitivity and resolution, and is thus suited as a micropatterning material for use in the processing of mask substrates.

201 citations


Journal ArticleDOI
TL;DR: In this paper, the authors describe the fabrication of three-dimensional photonic crystals using a reproducible and reliable procedure consisting of electron beam lithography followed by a sequence of dry etching steps.
Abstract: We describe the fabrication of three-dimensional photonic crystals using a reproducible and reliable procedure consisting of electron beam lithography followed by a sequence of dry etching steps. Careful fabrication has enabled us to define photonic crystals with 280 nm holes defined with 350 nm center to center spacings in GaAsP and GaAs epilayers. We construct these photonic crystals by transferring a submicron pattern of holes from 70-nm-thick polymethylmethacrylate resist layers into 300-nm-thick silicon dioxide ion etch masks, and then anisotropically angle etching the III-V semiconductor material using this mask. Here, we show the procedure used to generate photonic crystals with up to four lattice periods depth.

179 citations


Proceedings ArticleDOI
09 Jun 1995
TL;DR: In this article, a new epoxy-based resist that can be used to achieve high aspect ratios (> 10:1) using UV lithography is presented. But, the resist images exhibit straight sidewalls and developed patterns, have excellent thermal stability, good adhesion and chemical resistance.
Abstract: In recent years, increased activity in micromachining has driven the need for high aspect ratio thick films resist systems. This paper discusses a new epoxy based resist that can be used to achieve high aspect ratios (> 10:1) using UV lithography. The resulting negative resist system provides sharp, clean images in thick films (> 200 micrometers ). Because of the high aspect ratio and short exposure times, this material may be a viable candidate for producing the images required for micromachined parts. The resist images exhibit straight sidewalls and developed patterns, have excellent thermal stability, good adhesion, and chemical resistance. The high aspect ratio and high thermal stability make these epoxy resists suitable for other packaging applications such as plating stencils and optical wave guides.© (1995) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

146 citations


Patent
27 Oct 1995
TL;DR: In this article, columnar electrodes are formed on the metal layer 14 in the peripheral part of the silicon substrate 21 in a wafer state, a plating resist pattern 34 is formed, electroplating is performed by using the metal layers 14 or the like as a plated current path of one side, and columnar electrode are formed in the semiconductor device.
Abstract: PROBLEM TO BE SOLVED: To enable electroplating with one plating equipment, irrespective of kinds of silicon substrates in the state of a wafer, and make the height of columnar electrodes more uniform, in a semiconductor device having the columnar electrodes formed by electroplating. SOLUTION: A tray 11 for plating is used, in which a recessed part for silicon substrate arrangement is formed in the almost central part of the upper surface of a rectangular insulating substrate 12, and a metal layer 14 is formed in a region except the recessed part for silicon substrate arrangement and specified three edge parts, on the upper surface of the insulating substrate 12. A silicon substrate 21 in a wafer state is arranged in the recessed part for silicon substrate arrangement, a plating resist pattern 34 is formed, electroplating is performed by using the metal layer 14 or the like as a plating current path of one side, and columnar electrodes are formed on the silicon substrate 21. In this case, dummy columnar electrodes are formed on the metal layer 14 in the peripheral part of the silicon substrate 21.

129 citations


Journal ArticleDOI
TL;DR: In this paper, an atomic force microscope (AFM) is used to plow a pattern through the top of two resist layers spun onto a substrate, and the resist is then developed to create a mask through which material can be deposited.
Abstract: We describe a novel technique for fabricating metallic nanostructures on an arbitrary substrate using an atomic force microscope (AFM). An AFM is used to plow a pattern through the top of two resist layers spun onto a substrate. The resist is then developed to create a mask through which material can be deposited. By changing the applied force, the top resist‐layer thickness, or the development time, the linewidth can be varied. Continuous metallic wires ∼500 A×400 A×15 μm have been fabricated on bare substrates and between contact pads.

117 citations


Journal ArticleDOI
TL;DR: In this paper, a trilevel resist process has been developed which enables high-contrast imaging of periodic structures with spatial periods down to 200 nm in resist on highly reflective substrates, using λ=351.1 nm argon ion laser exposure.
Abstract: A novel trilevel resist process has been developed which enables high‐contrast imaging of periodic structures with spatial periods down to 200 nm in thick resist on highly reflective substrates, using λ=351.1 nm argon‐ion laser exposure. The process utilizes a 200‐nm‐thick, high‐contrast, imaging resist layer, a thin (∼15‐nm) evaporated dielectric interlayer, and a 300–600‐nm‐thick bottom antireflection coating (ARC) which suppresses reflections from the substrate. Our trilevel resist scheme has been implemented in a manufacturing process which utilizes a high‐contrast interferometric lithography system for the formation of large‐area, 200–1000 nm period grating and dot array images. The choice of interlayer is the most critical feature of this process. This material must have good deposition and adhesion properties, must be optically matched to the resist and ARC, must etch quickly during the reactive‐ion etching (RIE) pattern transfer from the resist into the interlayer, must display very high selectivity to the ARC during the RIE pattern transfer into the bottom layer, and must be easily stripped after the trilevel resist structure has served its purpose. We also report on computer modeling which elucidates the factors influencing standing wave formation and present results of tests with several interlayer materials which display good optical matching and selectivities of up to 240:1 during RIE of the ARC.

103 citations


Patent
04 Dec 1995
TL;DR: In this paper, an atomic force microscope is used to scan a silicon wafer in either the contact or non-contact mode, and an array of cantilevers are placed adjacent the wafer to be patterned.
Abstract: A lithography system includes a plurality of cantilevers, preferably formed in a silicon wafer. Each cantilever includes a tip located near the free end of the cantilever and an electrical conduction path which extends along the length of the cantilever to the tip. A switch is included in the conduction path to control the voltage at the tip of the cantilever. The array of such cantilevers is positioned adjacent a wafer which is to be patterned, in the manner of an atomic force microscope operating in either the contact or noncontact mode. The cantilever array is scanned over the wafer, preferably in a raster pattern, and the individual switches are operated so as to control an electric current or electric field at the tip of each cantilever. The electric current or field is used to write a pattern on a layer of resist coating the wafer or on the surface of the wafer itself. Alternatively, the lithographic pattern may be formed by using the tip to scribe lines in a thin layer of soft material coating the wafer.

97 citations


Journal ArticleDOI
TL;DR: In this article, a diacetylenic, self-assembled monolayer (SAM) resist and photolithographic and electrochemical methods are used to pattern a substrate using a negative photolithography resist.
Abstract: We report herein that a substrate can be patterned using a diacetylenic, self-assembled monolayer (SAM) resist and photolithographic and electrochemical methods. Our proof-of-concept experiments result in micron-scale pattern transfer onto Au substrates, but extension to other materials, including Si, Al, and GaAs, and nanometer-scale patterning will be straightforward. It is demonstrated that a SAM composed of diacetylenic organomercaptans can be used as a negative photolithographic resist. The importance of this method results from the fact that the resist is highly organized, thin, and largely defect free. These factors ensure high-resolution patterning and control over the surface energy and reactivity of the resist itself, which permits an added dimension of control over surface processing. In addition, resist stripping involves only gentle and easily controlled electrochemical methods. Moreover, we have previously shown that organized multilayers of polydiacetylenic SAMs can be easily formed, so resist thickness can be controlled over a broad range. Finally, unique electronic and photonic properties of the polymeric SAMs might themselves be integrated into Si-based devices using this lithographic approach in the future. 34 refs., 2 figs.

97 citations


Journal ArticleDOI
TL;DR: In this article, large area arrays of dots have been patterned in Au/Co/Au(111) sandwiches with ultrathin Co layers and a perpendicular easy magnetization axis.
Abstract: Large area arrays of dots have been patterned in Au/Co/Au(111) sandwiches with ultrathin Co layers (0.6 to 2 nm) and a perpendicular easy magnetization axis. Dot dimensions down to 0.2 μm have been achieved using x‐ray lithography, with either positive resist and direct ion beam etching or a lift‐off process with aluminum mask. Both processes have been tested against the damages they induce to the fragile structure of the samples. The magneto‐optical effects and magnetization reversal processes in the arrays have been characterized versus Co thickness, dot dimension, and lattice aspect ratio. For high quality samples, the domain walls propagation mechanism that drives magnetization reversal in as‐grown films is drastically modified in dot arrays, leading to a large increase of the coercive field with dot diameter reduction, together with changes in the shape of the hysteresis loops.

92 citations


Patent
23 Oct 1995
TL;DR: In this paper, a process for the direct production of an imaged pattern of resist on a substrate surface (such as a pattern of etch-resistant organic resin material on the surface of a copper-clad dielectric in connection with a printed circuit board (PCB) fabrication process or in the process of producing printed plates), which process utilizes thermo-resists rather than photoresists, is described.
Abstract: A process is described for the direct production of an imaged pattern of resist on a substrate surface (such as a pattern of etch-resistant organic resin material on the surface of a copper-clad dielectric in connection with a printed circuit board (PCB) fabrication process or in the process of producing printed plates), which process utilizes thermo-resists rather than photoresists, i.e., compositions which undergo thermally-induced, rather than photo-induced, chemical transformations. A film of thermo-resist composition applied to the substrate surface is scanned by a focused heat source (e.g., a thermal laser emitting in the IR region) in a predetermined pattern, without a phototool, to bring about localized thermally-induced chemical transformations of the composition which either directly produce the resist pattern or produce in the film a developable latent image of the pattern.

Journal ArticleDOI
TL;DR: In this paper, a 400 μm×100 μm parallel image was obtained in the time it would normally take to obtain a 100 μm × 100μm image, using a parallel array of five piezoresistive cantilevers.
Abstract: Lithography on (100) single‐crystal silicon and amorphous silicon is performed by electric‐field‐enhanced local oxidation of silicon using an atomic force microscope (AFM). Amorphous silicon is used as a negative resist to pattern silicon oxide, silicon nitride, and selected metals. Amorphous silicon is used in conjunction with chromium to create a robust etch mask, and with titanium to create a positive AFM resist. All lithographies presented here were patterned in parallel by arrays of two piezoresistive silicon or two silicon‐nitride cantilevers. Parallel arrays of five piezoresistive cantilevers were fabricated and used in imaging and lithographic applications. A 400 μm×100 μm parallel image is obtained in the time it would normally take to obtain a 100 μm×100 μm image. In our method of parallel operation, it is only possible to image and lithograph in modes that do not require feedback. In imaging, this limits the possible applications of the parallel AFM. During parallel lithography, discrepancies a...

Patent
Kazuya Kamon1
15 Sep 1995
TL;DR: In this article, an apparatus and method corrects for light proximity effects in exposure of a resist material using optical projection images. But the method is not suitable for light-sensitive circuits.
Abstract: An apparatus and method corrects for light proximity effects in exposure of a resist material. A circuit pattern to be formed on the wafer is defined by design data and that data is compressed for processing. The data is employed to prepare an optical projection image for transferring the circuit pattern onto the wafer. Before the pattern is transferred, the size of the pattern on the wafer that will result is predicted, using the optical projection image. The predicted pattern size is compared to the desired pattern size and, if there is sufficient difference, the compressed design data is corrected to produce the desired circuit pattern. Thereafter, the design data that has been corrected is expanded and output for use in the pattern transfer by light exposure using a mask produced according to the invention.

Journal ArticleDOI
TL;DR: In this paper, a high resolution cross-linked PMMA resist has been synthesized and optimized for the generation of zone plate patterns down to 19 nm linewidth with e−beam lithography.
Abstract: A high resolution cross‐linked PMMA resist has been synthesized and optimized for the generation of zone plate patterns down to 19 nm linewidth with e‐beam lithography. This resist shows an increased resolution compared to PMMA for generating periodic structures with a line to space ratio of 1:1. Furthermore, we developed a cross‐linked copolymer based on styrene and divinylbenzene, which is used in a new trilevel reactive ion etching (RIE) process. In this process a resist pattern of low aspect ratio can be transferred into a copolymer galvanoform with high aspect ratios for the electrodeposition of nickel. The copolymer has also been used as a highly selective etching mask for zone plate pattern transfer into germanium by RIE.

Patent
26 May 1995
TL;DR: Patterning of a layer of material that can be etched with a gaseous mixture of oxygen, chlorine, and nitrogen as etchant species, such as a chromium or an ammonium-containing compound layer, is accomplished by using a patterned organometallic resist, which contains silicon or germanium as mentioned in this paper.
Abstract: Patterning of a layer of material that can be etched with gaseous mixture of oxygen, chlorine, and nitrogen as etchant species, such as a chromium or a chromium-containing compound layer, is accomplished by using a patterned organometallic resist, such as a polymer which contains silicon or germanium. Although gaseous mixtures of chlorine and oxygen etch chromium anisotropically. Some undercut of the chromium is still observed. This undercut is controlled or eliminated by adding nitrogen to the gas mixture. Layers of material that have been patterned in this way can then be used for photolithographic masks or reticles, for X-ray masks, for e-beam masks. or for direct patterning of other, underlying layers in semiconductor integrated circuits or other devices.

Patent
27 Jan 1995
TL;DR: In this paper, a method of forming standoff spacer pedestals on a device above the substrate by supporting the electronic device with the standoff spacers during solder reflow and bonding is described.
Abstract: A method of forming standoff spacer pedestals on a device above the substrate by supporting the electronic device with the standoff spacer pedestals during solder reflow and bonding. Generally, the method comprising the steps of adhering at least one layer of film solder resist on the substrate, and eliminating the undesired portions of dry film solder resist to form the pedestals.

Patent
12 Oct 1995
TL;DR: In this article, an integral interconnecting post for mounting a microelectronic device such as an integral circuit chip is fabricated with generally uniform cross-section, by forming a first layer of positive photoresist on a substrate, soft-baking that first layer and exposing it for a short time with a wide-apertured mask or simply a UV blank flood exposure.
Abstract: An interconnecting post for mounting a microelectronic device such as an integral circuit chip is fabricated with generally uniform cross-section, by forming a first layer of positive photoresist on a substrate, soft-baking that first layer and exposing it for a short time with a wide-apertured mask or simply a UV blank flood exposure. Without developing the first layer, a second layer of positive resist is then applied over the first layer, soft-baked, and then exposed with a narrow-apertured mask. During the soft-baking of the second layer, some of its activator in the photoresist compound diffuses into the exposed portion of the first layer and modifies its solubility in such a way that, when the layers are subsequently developed, the developer partially undercuts the unexposed portion of the first layer to form in the photoresist an opening of generally uniform cross-section. This opening can then be filled by plating to produce a strong, integral interconnect post.

Patent
04 Apr 1995
TL;DR: In this paper, a resist-processing a rectangular substrate including a resist coating step of supplying resist solution to the substrate, while rotating it, to form resist film at least on one surface of it and a resist removing step of jetting removing liquid to both surfaces of it at its side peripheral portions to remove the resist film from them.
Abstract: A apparatus of resist-processing a rectangular substrate including a resist coating step of supplying resist solution to the substrate, while rotating it, to form resist film at least on one surface of it and a resist removing step of jetting removing liquid, which can solve resist, to both surfaces of it at its side peripheral portions to remove the resist film from them.

Patent
19 Apr 1995
TL;DR: In this article, a process for altering the susceptibility of a portion of a Spin-On Glass layer to etching is described, which enables the exposed and unexposed portions to be differentiated by selectively removing the more susceptible portions of the spin-on glass layer during development.
Abstract: A process is provided for altering the susceptibility of a portion of a Spin-On Glass layer to etching. The process includes taking a substrate including a layer of positive or negative resist Spin-On Glass and exposing a portion of the Spin-On Glass layer to an electric field or an electron beam. Depending on the particular Spin-On Glass used, exposure of a portion of the Spin-On Glass layer to the electric field or electron beam causes the exposed portion to have either significantly enhanced or reduced susceptibility to etching as compared to the unexposed portion. This enables the exposed and unexposed portions to be differentiated by selectively removing the more etch susceptible portions of the Spin-On Glass layer during development.

Patent
27 Dec 1995
TL;DR: In this paper, a two-beams interference method was used to detect the overlay difference between the master mask and the mask mask. But the interference pattern produced by white light was not considered.
Abstract: An overlay measurement pattern, which is formed in a master pattern of a mask, is selectively transferred by exposure processing onto a resist film on a wafer of semiconductor material. This is followed by detecting, by means of a two-beams interference method, a reference position for the overlay measurement pattern formed by the variation in film thickness occurring at an exposed resist region, with performing no development processing. A reference position for an overlay reference pattern, which is pre-formed in the semiconductor wafer, is detected using an interference pattern produced by white light, to detect an overlay difference between the patterns. Since neither a test exposure process nor a development process is needed to be carried out, this results in not only providing a higher throughput rate but also eliminating factors that contribute to degradation of the accuracy of overlay caused by base line stability and mask alignment repeatability. A higher overlay accuracy is achieved accordingly.

Proceedings ArticleDOI
09 Jun 1995
TL;DR: Supercritical fluid (SCF) technology is investigated as a dry technique for photoresist developing as mentioned in this paper, which offers the potential for processing advanced resist systems which are currently under investigation as well as those that may have been abandoned due to problems associated with conventional developers.
Abstract: Supercritical fluid (SCF) technology is investigated as a dry technique for photoresist developing. Because of their unique combination of gaseous and liquid-like properties, these fluids offer comparative or improved efficiencies over liquid developers and, particularly carbon dioxide, would have tremendous beneficial impact on the environment and on worker safety. Additionally, SCF technology offers the potential for processing advanced resist systems which are currently under investigation as well as those that may have been abandoned due to problems associated with conventional developers. An investigation of various negative and positive photoresist systems is ongoing. Initially, supercritical carbon dioxide (SC CO2) as a developer for polysilane resists was explored because the exposure products, polysiloxanes, are generally soluble in this fluid. These initial studies demonstrated the viability of the SCF technique with both single layer and bilayer systems. Subsequently, the investigation focused on using SC CO2 to produce negative images with polymers that would typically be considered positive resists. Polymers such as styrenes and methacrylates were chemically modified by fluorination and/or copolymerization to render them soluble in SC CO2. Siloxane copolymers and siloxane-modified methacrylates were examined as well. The preliminary findings reported here indicate the feasibility of using SC CO2 for photoresist developing.© (1995) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Patent
23 Jun 1995
TL;DR: In this article, a method for the fabrication of electrodes, and especially microelectrodes, is described, in which the (micro)electrode consists essentially of an electrically insulating material through which apertures are formed to reveal the electricallyconducting material, characterised by the use of a lighthardened (photopolymerizing) resist or a light-softened (photoinduced breaking of bonds) resist.
Abstract: A method for the fabrication of electrodes, and especially microelectrodes, in which the (micro)electrode consists essentially of an electrically-insulating material through which apertures are formed to reveal the electrically-conducting material, is characterised in that the apertures are formed by the use of a light-hardened (photopolymerizing) resist or a light-softened (photoinduced breaking of bonds) resist.

Patent
Yuko Kaimoto1, Koji Nozaki1
10 May 1995
TL;DR: In this article, a resist composition and a process for forming a resist pattern using resist composition are disclosed, which includes 100 parts by weight of a copolymer of a 2-norbornene-2-substituent unit and an acrylic acid ester unit.
Abstract: A resist composition and a process for forming a resist pattern using a resist composition are disclosed. The present composition includes 100 parts by weight of a copolymer of a 2-norbornene-2-substituent unit and an acrylic acid ester unit of the formula I; ##STR1## wherein, X is a cyano or chloro group, R is tert-butyl, dimethylbenzyl, or tetrahydropyranyl, m is an integer of 9 to 2390, and n is an integer of 21 to 5180, and 1 to 20 parts by weight of a photo acid generator. A finely-resolved resist pattern with high sensitivity and good dry etch resistance is obtained by the present composition and present process for forming the resist pattern.

Patent
12 Jun 1995
TL;DR: In this article, a method for producing a lead frame having outer leads and inner leads, for use in constructing a resin-sealed semiconductor package comprises etching processes for etching a blank.
Abstract: A method for producing a lead frame having outer leads and inner leads, for use in constructing a resin-sealed semiconductor package comprises etching processes for etching a blank. A first resist pattern having a first opening and a second resist pattern having second openings are formed on the first and the second major surfaces of a blank. The first and the second major surfaces of the blank are etched through the first and the second resist pattern by a first etching process using a first etchant to form a first recess corresponding to the first opening and second recesses corresponding to the second recesses in the first and the second major surfaces, respectively. The first recess is filled up with an etch-resistant layer. The second major surface is etched through the second resist pattern by a second etching process using a second etchant so that portions of the blank corresponding to the second openings of the second resist pattern are etched through to form the tips of the inner leads.

Journal ArticleDOI
TL;DR: In this article, a method for mass fabrication of environmentally rugged monolithic diffractive optical elements (DOEs) is demonstrated, where a one-step optical exposure with a gray level mask was used to produce analog resist profiles that were transferred into their substrates using chemically assisted ion beam etching.
Abstract: A method for mass fabrication of environmentally rugged monolithic diffractive optical elements (DOEs) is demonstrated. A one‐step optical exposure, with a gray level mask, was used to produce analog resist profiles that were transferred into their substrates using chemically assisted ion beam etching in a single etching step. The described procedure allows mass fabrication of DOEs without the tedious multiple exposure and etching steps commonly used in multilevel DOE fabrication. To generate a multilevel DOE in an optical substrate, only a single exposure using a gray level mask and a single etching step are necessary. The fabrication method presented will reduce processing time and increase manufacturability, which will result in a general cost reduction per element.

Journal ArticleDOI
TL;DR: An iterative method was used to compensate for the proximity effect caused by electron scattering in the resist and from the substrate during the e-beam exposure, which will result in a general cost reduction per element.
Abstract: We present a method to fabricate high-quality and environmentally rugged monolithic diffractive optical elements (DOE's). Analog direct-write e-beam lithography was used to produce analog resist profiles that were transferred into their substrates by the use of chemically assisted ion-beam etching (CAIBE) in one single etching step. An iterative method was used to compensate for the proximity effect caused by electron scattering in the resist and from the substrate during the e-beam exposure. Slope-dependent differential etch rates that occur during the transfer process were characterized and compensated for. Finally, the DOE was divided into regions with different period ranges, and the exposure dosages were set to achieve even and accurate etch depths in the final element. The presented fabrication method will increase manufacturability and reduce processing time, which will result in a general cost reduction per element.

Patent
22 Dec 1995
TL;DR: In this paper, a process for producing laminated film/metal structures comprising bumped circuit traces on a nonconductive substrate is described. But the process is restricted to a single circuit and is not suitable for other applications.
Abstract: A process for producing laminated film/metal structures comprising bumped circuit traces on a non-conductive substrate wherein a copper sheet/polyimide film laminate is coated with resist on the exterior surfaces. The resist adjacent the polyimide film is selectively exposed and etched to expose an area of the polyimide film. The exposed polyimide film is etched to form vias through the polyimide film to the inner side of the copper sheet. The resist adjacent the polyimide film is stripped away and a metal bump is electrolytically plated through each via onto the copper sheet. A subsequent layer of resist is electrophoretically applied over the bumps. The resist material adjacent the copper sheet is then selectively exposed and etched to expose areas of the copper sheet. The exposed copper sheet is etched to form circuit traces and the remaining resist adjacent both the polyimide film and the copper sheet is stripped away.

Patent
Hiroyoshi Tanabe1
24 Feb 1995
TL;DR: In this article, an exposure system includes at least an illuminating system for irradiating a linearly polarized illumination light on a mask with a predetermined pattern and a mounting system on which a wafer is placed, wherein further provision is made of an element for controlling a polarization direction of the light at a p-polarization direction at least when the light is irradiated on a sloped or vertical portion of the wafer.
Abstract: An exposure system includes at least an illuminating system for irradiating a linearly polarized illumination light on a mask with a predetermined pattern and a mounting system on which a wafer is placed, the wafer is provided thereon with a resist film, wherein further provision is made of an element for controlling a polarization direction of the light at a p-polarization direction at least when the light is irradiated on a sloped or vertical portion of the wafer.

Journal ArticleDOI
TL;DR: In this paper, an electron beam nanolithography system is presented, which features sub-10-nm beam size over a large 480×480 µ m2 field and a high 70 kV acceleration voltage with a Zr/O/W thermal field emitter tip.
Abstract: We present an electron beam nanolithography system which features sub-10-nm beam size over a large 480×480 µ m2 field and a high 70 kV acceleration voltage with a Zr/O/W thermal field emitter tip. A beam can be deflected at 100 MHz in 2-nm steps, which allows the use of highly sensitive resist. The system is equipped with a highly sensitive YAG detector for electrons backscattered from a registration mark as well as a C/W multilayer knife edge for beam size measurement and focusing. These techniques achieve a beam size of about 6 nm. A 10-nm-scale resist pattern was obtained using ZEP520 resist with this system. Furthermore, Si nanostructures have been obtained by using an image reversal process with ECR plasma oxidation. Photoluminescence was observed from the Si nanowires fabricated with this system.

Journal ArticleDOI
TL;DR: In this paper, the surface potential of a resist film during and after exposure was measured directly, and the results showed that the surface of the resist film charged positively at higher energies (10 keV).
Abstract: Charging of the workpiece in electron beam lithography is well recognized as a source of pattern placement error. Despite considerable previous effort there is little quantitative understanding of the problem. A new technique was recently reported in which the surface potential of a resist film during and after exposure was measured directly. Here we describe results obtained using an improved version of the technique for charging of resists under a wide variety of conditions. Some results are as expected, e.g., thicker resists tended to charge more negatively than did thinner ones. Other results are surprising; for example, under certain conditions (7 keV, 0.4 μm polybutene sulfone) there was zero potential at the surface and at higher energies (10 keV) the surface charged positively (0.7 V). The detailed mechanism for positive charging under these conditions is still unclear.