L
Laurent Grenouillet
Researcher at University of Grenoble
Publications - 45
Citations - 378
Laurent Grenouillet is an academic researcher from University of Grenoble. The author has contributed to research in topics: Transistor & CMOS. The author has an hindex of 6, co-authored 45 publications receiving 201 citations. Previous affiliations of Laurent Grenouillet include Commissariat à l'énergie atomique et aux énergies alternatives & Alternatives.
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Proceedings ArticleDOI
Vertically stacked-NanoWires MOSFETs in a replacement metal gate process with inner spacer and SiGe source/drain
Sylvain Barraud,V. Lapras,M.-P. Samson,L. Gaben,Laurent Grenouillet,V. Maffini-Alvaro,Yves Morand,J. Daranlot,N. Rambal,B. Previtalli,Shay Reboh,Claude Tabone,R. Coquand,E. Augendre,Olivier Rozeau,J.M. Hartmann,C. Vizioz,Christian Arvet,Patricia Pimenta-Barros,Nicolas Posseme,Virginie Loup,C. Comboroure,C. Euvrard,V. Balan,I. Tinti,G. Audoit,Nicolas Bernier,David Cooper,Zineb Saghi,F. Allain,A. Toffoli,O. Faynot,Maud Vinet +32 more
TL;DR: In this article, vertically stacked horizontal Si nano-wire (NW) /-MOSFETs fabricated with a replacement metal gate (RMG) process are integrated with inner spacers and SiGe source-drain (S/D) stressors.
Proceedings ArticleDOI
Demonstration of BEOL-compatible ferroelectric Hf 0.5 Zr 0.5 O 2 scaled FeRAM co-integrated with 130nm CMOS for embedded NVM applications
T. Francois,C. Pellissier,Stefan Slesazeck,Viktor Havel,Claudia Richter,A. Makosiej,Bastien Giraud,Evelyn T. Breyer,Monica Materano,P. Chiquet,Marc Bocquet,Laurent Grenouillet,Etienne Nowak,Uwe Schroeder,F. Gaillard,J. Coignus,P. Blaise,C. Carabasse,Nicolas Vaxelaire,T. Magis,F. Aussenac,Virginie Loup +21 more
TL;DR: Results pave the way to < 10fJ/bit ultra-low power FeRAM for IoT applications by successfully co-integrating TiN/HZO/TiN capacitors for the first time in the Back-End-Of-Line of 130nm CMOS technology.
Journal ArticleDOI
Resistive RAM Endurance: Array-Level Characterization and Correction Techniques Targeting Deep Learning Applications
Alessandro Grossi,Elisa Vianello,Mohamed M. Sabry,Marios Barlas,Laurent Grenouillet,Jean Coignus,Edith Beigne,Tony F. Wu,Binh Quang Le,Mary Wootters,Cristian Zambelli,Etienne Nowak,Subhasish Mitra +12 more
TL;DR: It is shown how technology, RRAM programing-, and system resilience-level solutions can be effectively combined to design new generations of energy-efficient computing systems that can successfully run deep learning applications despite TWFs and PWFs.
Proceedings ArticleDOI
Nanosecond Laser Anneal (NLA) for Si-implanted HfO2 Ferroelectric Memories Integrated in Back-End Of Line (BEOL)
Laurent Grenouillet,T. Francois,Jean Coignus,Sebastien Kerdiles,Nicolas Vaxelaire,C. Carabasse,Furqan Mehmood,S. Chevalliez,C. Pellissier,F. Triozon,F. Mazen,Guillaume Rodriguez,T. Magis,Viktor Havel,Stefan Slesazeck,F. Gaillard,Uwe Schroeder,Thomas Mikolajick,Etienne Nowak +18 more
TL;DR: In this paper, Si-implanted HfO 2 is demonstrated to be ferroelectric for the first time when integrated in a back-end-of-line (BEOL) 130nm CMOS.
Journal ArticleDOI
Impact of area scaling on the ferroelectric properties of back-end of line compatible Hf0.5Zr0.5O2 and Si:HfO2-based MFM capacitors
T. Francois,T. Francois,Laurent Grenouillet,Jean Coignus,Nicolas Vaxelaire,C. Carabasse,F. Aussenac,S. Chevalliez,Stefan Slesazeck,Claudia Richter,P. Chiquet,Marc Bocquet,Uwe Schroeder,Thomas Mikolajick,F. Gaillard,Etienne Nowak +15 more
TL;DR: In this paper, the scaling of planar HfO2-based ferroelectric capacitors is investigated experimentally by varying the capacitor area within five orders of magnitude, under the scope of a limited thermal budget for crystallization.