A
A. Toffoli
Researcher at University of Grenoble
Publications - 5
Citations - 134
A. Toffoli is an academic researcher from University of Grenoble. The author has contributed to research in topics: PMOS logic & CMOS. The author has an hindex of 4, co-authored 5 publications receiving 101 citations.
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Proceedings ArticleDOI
Vertically stacked-NanoWires MOSFETs in a replacement metal gate process with inner spacer and SiGe source/drain
Sylvain Barraud,V. Lapras,M.-P. Samson,L. Gaben,Laurent Grenouillet,V. Maffini-Alvaro,Yves Morand,J. Daranlot,N. Rambal,B. Previtalli,Shay Reboh,Claude Tabone,R. Coquand,E. Augendre,Olivier Rozeau,J.M. Hartmann,C. Vizioz,Christian Arvet,Patricia Pimenta-Barros,Nicolas Posseme,Virginie Loup,C. Comboroure,C. Euvrard,V. Balan,I. Tinti,G. Audoit,Nicolas Bernier,David Cooper,Zineb Saghi,F. Allain,A. Toffoli,O. Faynot,Maud Vinet +32 more
TL;DR: In this article, vertically stacked horizontal Si nano-wire (NW) /-MOSFETs fabricated with a replacement metal gate (RMG) process are integrated with inner spacers and SiGe source-drain (S/D) stressors.
Proceedings ArticleDOI
Ultra-Thin Fully Depleted SOI Devices with Thin BOX, Ground Plane and Strained Liner Booster
C. Gallon,Claire Fenouillet-Beranger,A. Vandooren,Frederic Boeuf,Stephane Monfray,F. Payet,S. Orain,Vincent Fiori,F. Salvetti,Nicolas Loubet,C. Charbuillet,A. Toffoli,F. Allain,K. Romanjek,Ian Cayrefourcq,Bruno Ghyselen,Carlos Mazure,D. Delille,F. Judong,C. Perrot,M. Hopstaken,P. Scheblin,P. Rivallin,L. Brevard,O. Faynot,Sorin Cristoloveanu,Thomas Skotnicki +26 more
TL;DR: In this paper, the use of a thin buried oxide (BOX) on FD SOI MOSFET is investigated for improving short channel effect (SCE) control, especially with ground plane integration.
Proceedings ArticleDOI
Key process steps for high performance and reliable 3D Sequential Integration
C.-M. V. Lu,F. Deprat,Claire Fenouillet-Beranger,Perrine Batude,Xavier Garros,A. Tsiara,Charles Leroux,R. Gassilloud,D. Nouguier,D. Ney,Xavier Federspiel,P. Besombes,A. Toffoli,G. Romano,N. Rambal,Vincent Delaye,D. Barge,M.-P. Samson,Bernard Previtali,Claude Tabone,L. Pasini,Laurent Brunet,Francois Andrieu,J. Micoud,Thomas Skotnicki,Maud Vinet +25 more
TL;DR: In this article, a 3D sequential integration with intermediate BEOL (iBEOL) in between tiers is proposed to match the process windows of bottom layers of bottom FET and iBEOL.
Proceedings ArticleDOI
High performance and low variability fully-depleted strained-SOI MOSFETs
J. Mazurier,Olivier Weber,Francois Andrieu,F. Allain,C. Tabone,A. Toffoli,Claire Fenouillet-Beranger,L. Brevard,L. Tosti,Pierre Perreau,M. Belleville,O. Faynot +11 more
TL;DR: In this paper, the authors demonstrate high performance Fully Depleted Silicon-On-Insulator CMOS on 300mm strained SOI (sSOI) wafers and highlight the same excellent V T variability as the transistors on unstrained SOI.
Proceedings ArticleDOI
Comparison between and oriented channels in highly strained FDSOI pMOSFETs
S. Morvan,Francois Andrieu,P. Nguyen,J.M. Hartmann,Mikael Casse,Claude Tabone,A. Toffoli,F. Allain,Walter Schwarzenbach,Gerard Ghibaudo,Bich-Yen Nguyen,Nicolas Daval,Michel Haond,Thierry Poiroux,O. Faynot +14 more
TL;DR: In this paper, the impact of different stressors (CESL, raised sources and drains, STI) on planar FDSOI pMOSFETs was studied for different device geometries and channel orientations.