N
N. Rambal
Researcher at University of Grenoble
Publications - 35
Citations - 669
N. Rambal is an academic researcher from University of Grenoble. The author has contributed to research in topics: PMOS logic & Very-large-scale integration. The author has an hindex of 12, co-authored 34 publications receiving 490 citations. Previous affiliations of N. Rambal include STMicroelectronics.
Papers
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Proceedings ArticleDOI
3DVLSI with CoolCube process: An alternative path to scaling
Perrine Batude,Claire Fenouillet-Beranger,L. Pasini,V. Lu,F. Deprat,Laurent Brunet,Benoit Sklenard,F. Piegas-Luce,M. Casse,B. Mathieu,O. Billoint,G. Cibrario,Ogun Turkyilmaz,Hossam Sarhan,Sebastien Thuries,Louis Hutin,S. Sollier,Julie Widiez,L. Hortemel,Claude Tabone,M.-P. Samson,Bernard Previtali,N. Rambal,F. Ponthenier,J. Mazurier,Remi Beneyton,M. Bidaud,Emmanuel Josse,E. Petitprez,O. Rozeau,Maurice Rivoire,C. Euvard-Colnat,A. Seignard,F. Fournel,L. Benaissa,Perceval Coudrain,P. Leduc,J.M. Hartmann,Pascal Besson,Sebastien Kerdiles,C. Bout,Fabrice Nemouchi,A. Royer,C. Agraffeil,G. Ghibaudo,Thomas Signamarcheix,Michel Haond,Fabien Clermidy,O. Faynot,Maud Vinet +49 more
TL;DR: In this paper, the authors propose a 3D VLSI with a CoolCube integration to vertically stack several layers of devices with a unique connecting via density above a million/mm2.
Proceedings ArticleDOI
Vertically stacked-NanoWires MOSFETs in a replacement metal gate process with inner spacer and SiGe source/drain
Sylvain Barraud,V. Lapras,M.-P. Samson,L. Gaben,Laurent Grenouillet,V. Maffini-Alvaro,Yves Morand,J. Daranlot,N. Rambal,B. Previtalli,Shay Reboh,Claude Tabone,R. Coquand,E. Augendre,Olivier Rozeau,J.M. Hartmann,C. Vizioz,Christian Arvet,Patricia Pimenta-Barros,Nicolas Posseme,Virginie Loup,C. Comboroure,C. Euvrard,V. Balan,I. Tinti,G. Audoit,Nicolas Bernier,David Cooper,Zineb Saghi,F. Allain,A. Toffoli,O. Faynot,Maud Vinet +32 more
TL;DR: In this article, vertically stacked horizontal Si nano-wire (NW) /-MOSFETs fabricated with a replacement metal gate (RMG) process are integrated with inner spacers and SiGe source-drain (S/D) stressors.
Proceedings ArticleDOI
3D Sequential Integration: Application-driven technological achievements and guidelines
Perrine Batude,Laurent Brunet,C. Fenouillet-Beranger,Francois Andrieu,J.-P. Colinge,Didier Lattard,E. Vianello,Sebastien Thuries,O. Billoint,Pascal Vivet,Cristiano Santos,B. Mathieu,Benoit Sklenard,C.-M. V. Lu,J. Micout,F. Deprat,E. Avelar Mercado,F. Ponthenier,N. Rambal,M.-P. Samson,M. Casse,Sebastien Hentz,Julien Arcamone,Gilles Sicard,Louis Hutin,L. Pasini,A. Ayres,O. Rozeau,R. Berthelon,Fabrice Nemouchi,Philippe Rodriguez,J.-B. Pin,D. Larmagnac,A. Duboust,V. Ripoche,S. Barraud,N. Allouti,Sébastien Barnola,C. Vizioz,J.M. Hartmann,Sebastien Kerdiles,P. Acosta Alba,S. Beaurepaire,V. Beugin,F. Fournel,Pascal Besson,Virginie Loup,R. Gassilloud,François Martin,X. Garros,Frédéric Mazen,Bernard Previtali,C. Euvrard-Colnat,V. Balan,C. Comboroure,M. Zussy,Mazzocchi,O. Faynot,M. Vinet +58 more
TL;DR: 3D Sequential Integration with ultra-small 3D contact pitch with Ultra-Low TB FETs has potential for low-power applications and allow for the stacking of multiple layers.
Proceedings ArticleDOI
New insights on bottom layer thermal stability and laser annealing promises for high performance 3D VLSI
Claire Fenouillet-Beranger,B. Mathieu,Bernard Previtali,M.-P. Samson,N. Rambal,V. Benevent,Sebastien Kerdiles,J.P. Barnes,D. Barge,Pascal Besson,R. Kachtouli,M. Casse,X. Garros,A. Laurent,Fabrice Nemouchi,Karim Huet,I. Toque-Tresonne,D. Lafond,H. Dansas,F. Aussenac,G. Druais,Pierre Perreau,E. Richard,S. Chhun,E. Petitprez,N. Guillot,F. Deprat,L. Pasini,Laurent Brunet,V. Lu,C. Reita,Perrine Batude,M. Vinet +32 more
TL;DR: In this article, the maximum thermal budget of in-situ doped source/drain State Of The Art (SOTA) FDSOI bottom MOSFET transistors is quantified to ensure transistors stability in sequential 3D integration.
Proceedings ArticleDOI
Monolithic 3D integration: A powerful alternative to classical 2D scaling
M. Vinet,Perrine Batude,Claire Fenouillet-Beranger,Fabien Clermidy,Laurent Brunet,O. Rozeau,JM Hartmannn,O. Billoint,G. Cibrario,Bernard Previtali,Claude Tabone,Benoit Sklenard,Ogun Turkyilmaz,F. Ponthenier,N. Rambal,M.-P. Samson,F. Deprat,V. Lu,L. Pasini,Sebastien Thuries,Hossam Sarhan,J-E. Michallet,O. Faynot +22 more
TL;DR: In this paper, the potential solutions to obtain a high performance low temperature top transistor while keeping bottom MOSFET integrity are discussed. And the opportunities brought by M3DI and highlights the applications benefiting from this small 3D contact pitch.