In the past decade, extracellular vesicles (EVs) have been recognized as potent vehicles of intercellular communication, both in prokaryotes and eukaryotes. This is due to their capacity to transfer proteins, lipids and nucleic acids, thereby influencing various physiological and pathological functions of both recipient and parent cells. While intensive investigation has targeted the role of EVs in different pathological processes, for example, in cancer and autoimmune diseases, the EV-mediated maintenance of homeostasis and the regulation of physiological functions have remained less explored. Here, we provide a comprehensive overview of the current understanding of the physiological roles of EVs, which has been written by crowd-sourcing, drawing on the unique EV expertise of academia-based scientists, clinicians and industry based in 27 European countries, the United States and Australia. This review is intended to be of relevance to both researchers already working on EV biology and to newcomers who will encounter this universal cell biological system. Therefore, here we address the molecular contents and functions of EVs in various tissues and body fluids from cell systems to organs. We also review the physiological mechanisms of EVs in bacteria, lower eukaryotes and plants to highlight the functional uniformity of this emerging communication system.

/pdf/biological-properties-of-extracellular-vesicles-and-their-bef7axtqvb.pdf

Biological properties of extracellular vesicles and their physiological functions

Within the past decade, extracellular vesicles have emerged as important mediators of intercellular communication, being involved in the transmission of biological signals between cells in both prokaryotes and higher eukaryotes to regulate a diverse range of biological processes. In addition, pathophysiological roles for extracellular vesicles are beginning to be recognized in diseases including cancer, infectious diseases and neurodegenerative disorders, highlighting potential novel targets for therapeutic intervention. Moreover, both unmodified and engineered extracellular vesicles are likely to have applications in macromolecular drug delivery. Here, we review recent progress in understanding extracellular vesicle biology and the role of extracellular vesicles in disease, discuss emerging therapeutic opportunities and consider the associated challenges.

/pdf/extracellular-vesicles-biology-and-emerging-therapeutic-4wc2updtyj.pdf

Extracellular vesicles: biology and emerging therapeutic opportunities

MicroRNAs in Stress Signaling and Human Disease

The shear-responsive transcription factor Kruppel-like factor 2 (KLF2) is a critical regulator of endothelial gene expression patterns induced by atheroprotective flow. As microRNAs (miRNAs) post-transcriptionally control gene expression in many pathogenic and physiological processes, we investigated the regulation of miRNAs by KLF2 in endothelial cells. KLF2 binds to the promoter and induces a significant upregulation of the miR-143/145 cluster. Interestingly, miR-143/145 has been shown to control smooth muscle cell (SMC) phenotypes; therefore, we investigated the possibility of transport of these miRNAs between endothelial cells and SMCs. Indeed, extracellular vesicles secreted by KLF2-transduced or shear-stress-stimulated HUVECs are enriched in miR-143/145 and control target gene expression in co-cultured SMCs. Extracellular vesicles derived from KLF2-expressing endothelial cells also reduced atherosclerotic lesion formation in the aorta of ApoE(-/-) mice. Combined, our results show that atheroprotective stimuli induce communication between endothelial cells and SMCs through an miRNA- and extracellular-vesicle-mediated mechanism and that this may comprise a promising strategy to combat atherosclerosis.

/pdf/atheroprotective-communication-between-endothelial-cells-and-2ijakoa7r0.pdf

Atheroprotective communication between endothelial cells and smooth muscle cells through miRNAs.

State-of-the-art on use of insects as animal feed.

Nowadays Field Programmable Gate Arrays (FPGAs) are an improved technology for developing high-performance embedded systems. SRAM-based FPGAs offers the possibility of in-the-field reconfiguration that results in the ability to adapt the product to modified user's requirements, to enrich the product's features, or simply to correct bugs. With the advent of multi-million gate FPGAs, the size of the configuration information that defines what circuit the FPGA implements has increased drastically, and thus the amount of external memory needed to keep the configuration data is increasing dramatically. In this work we developed a novel configuration compression system that exploits internal configuration mechanism of modern SRAM-based FPGAs and results in high compression efficiency. The proposed system is applicable to any modern SRAM-based FPGA devices having an embedded microprocessor core since the configuration data are processed as raw data. Moreover, the proposed approach does not require any external hardware support and allows high speed dynamic reconfiguration. Experimental results on Xilinx SRAM-based FPGAs platform implementing several real-world circuits demonstrated 82% savings in memory on the average.

A new decompression system for the configuration process of SRAM-based FPGAS

Electronic systems for safety critical applications such as space and avionics need the maximum level of dependability for guarantee the success of their missions. Contrariwise the computation capabilities required in these fields are constantly increasing for afford the implementation of different kind of applications ranging from the signal processing to the networking. SRAM-based FPGA is the candidate device for achieve this goal thanks to their high versatility of implementing complex circuits with a very short development time. However, in critical environments, the presence of Single Event Upsets (SEUs) affecting the FPGA's functionalities, requires the adoption of specific fault tolerant techniques, like Triple Modular Redundancy (TMR), able to increase the protection capability against radiation effects, but on the other side, introducing a dramatic penalty in terms of performances. In this paper, it is proposed a new timing-driven placement algorithm for implementing soft-errors resilient circuits on SRAM-based FPGAs with a negligible degradation of performance. The algorithm is based on a placement heuristic able to remove the crossing error domains while decreasing the routing congestions and delay inserted by the TMR routing and voting scheme. Experimental analysis performed by timing analysis and SEU static analysis point out a performance improvement of 29% on the average with respect to standard TMR approach and an increased robustness against SEU affecting the FPGA's configuration memory.

Timing Driven Placement for Fault Tolerant Circuits Implemented on SRAM-Based FPGAs

Over the past decade, the complexity of electronic devices in the automotive systems increased significantly. The modern high level vehicles include more than 70 Electronic Control Units (ECUs) aimed at managing the powertrain of the vehicle, and improving passengers' comfort and safety. ECU microcontrollers aimed at the control of the fuel injection system have a key role. In this paper we present a new FPGA-based platform able to supervise and validate Commercial-Off-The-Shelf timer modules used in today state-of-the-art software applications for automotive fuel injection system with an accuracy improvement of more than 20% with respect to traditional approach. The proposed approach allows an effective and accurate validation of timing signals and it has two main advantages: can be customized with the exact timing module configurations to meet the exigency of new tests and allows effective modularity design test. As case study two industrial Time Modules manufactured by Freescale and Bosch have been used. The experimental analysis demonstrates the capability of the proposed approach providing a timing and angular precision of 10 ns and 10−5 degrees respectively.

An FPGA-based testing platform for the validation of automotive powertrain ECU

Triple modular redundancy (TMR) is recognized as one of the possible solutions to harden circuits implemented on SRAM-based FPGAs against soft-errors affecting configuration memory and user memory. Several works already showed cross-section figures confirming the soundness of TMR principle, however some faults still escape the TMR's fault masking mechanism. In this work we analyzed by means of extensive fault-injection experiments the TMR architecture. We identified some of the causes that are responsible for the escaped faults, and we proposed some possible solutions. In our analyses we considered both the TMR and one of its enhanced versions, the XTMR.

Luca Sterpone

Papers

A new decompression system for the configuration process of SRAM-based FPGAS

Timing Driven Placement for Fault Tolerant Circuits Implemented on SRAM-Based FPGAs

An FPGA-based testing platform for the validation of automotive powertrain ECU

An experimental analysis of hardening techniques for SRAM-based FPGAs

A probe-based SEU detection method for SRAM-based FPGAs