M
Matteo Sonza Reorda
Researcher at Polytechnic University of Turin
Publications - 340
Citations - 5043
Matteo Sonza Reorda is an academic researcher from Polytechnic University of Turin. The author has contributed to research in topics: Fault coverage & Automatic test pattern generation. The author has an hindex of 32, co-authored 295 publications receiving 4525 citations. Previous affiliations of Matteo Sonza Reorda include University of California, Riverside & NXP Semiconductors.
Papers
More filters
A new approach to software-implemented fault tolerance
TL;DR: A new approach for providing fault detection and correction capabilities by using software techniques only is described, suitable for developing safety-critical applications exploiting unhardened commercial-off-the-shelf processor-based architectures.
Proceedings ArticleDOI
An Effective Technique for Minimizing the Cost of Processor Software-Based Diagnosis in SoCs
Paolo Bernardi,Ernesto Sanchez,Massimiliano Schillaci,Giovanni Squillero,Matteo Sonza Reorda +4 more
TL;DR: A novel cost-effective approach to the construction of diagnostic software-based test sets for microprocessors by exploiting an existing post-production test set, designed for software- based self-test, and an already developed infrastructure IP to perform the diagnosis.
Proceedings ArticleDOI
Improved software-based processor control-flow errors detection technique
TL;DR: This paper presented software implemented hardware fault detection (SIHFD) for developing safety critical applications and proposed some rules which, being applied on high-level descriptions of the program, allow overcoming detected problems and further increasing error coverage.
Journal ArticleDOI
System-in-package testing: problems and solutions
TL;DR: Test strategies for known good die and known good substrate in the SiP are provided and case studies prove feasibility using the IEEE 1500 test structure.
Book ChapterDOI
Simulation-Based Analysis of SEU Effects on SRAM-based FPGAs
TL;DR: In this paper, a new fault injection environment, which offers an alternative to radiation testing for evaluating the effects of charged particles on the configuration memory of SRAM-based FPGA devices, is proposed.