: This research organizes, presents, and analyzes contemporary Multiobjective Evolutionary Algorithm (MOEA) research and associated Multiobjective Optimization Problems (MOPs). Using a consistent MOEA terminology and notation, each cited MOEAs' key factors are presented in tabular form for ease of MOEA identification and selection. A detailed quantitative and qualitative MOEA analysis is presented, providing a basis for conclusions about various MOEA-related issues. The traditional notion of building blocks is extended to the MOP domain in an effort to develop more effective and efficient MOEAs. Additionally, the MOEA community's limited test suites contain various functions whose origins and rationale for use are often unknown. Thus, using general test suite guidelines appropriate MOEA test function suites are substantiated and generated. An experimental methodology incorporating a solution database and appropriate metrics is offered as a proposed evaluation framework allowing absolute comparisons of specific MOEA approaches. Taken together, this document's classifications, analyses, and new innovations present a complete, contemporary view of current MOEA "state of the art" and possible future research. Researchers with basic EA knowledge may also use part of it as a largely self-contained introduction to MOEAs.

Multiobjective evolutionary algorithms: classifications, analyses, and new innovations

From the Publisher:
This work covers all aspects of physical design. The book is a core reference for graduate students and CAD professionals. For students, concept and algorithms are presented in an intuitive manner. For CAD professionals, the material presents a balance of theory and practice. An extensive bibliography is provided which is useful for finding advanced material on a topic. At the end of each chapter, exercises are provided, which range in complexity from simple to research level.

Algorithms for VLSI Physical Design Automation

This paper is the result of a literature study carried out by the authors. It is a review of the different attempts made to solve the Travelling Salesman Problem with Genetic Algorithms. We present crossover and mutation operators, developed to tackle the Travelling Salesman Problem with Genetic Algorithms with different representations such as: binary representation, path representation, adjacency representation, ordinal representation and matrix representation. Likewise, we show the experimental results obtained with different standard examples using combination of crossover and mutation operators in relation with path representation.

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Genetic Algorithms for the Travelling Salesman Problem: A Review of Representations and Operators

Hybrid metaheuristics have received considerable interest these recent years in the field of combinatorial optimization. A wide variety of hybrid approaches have been proposed in the literature. In this paper, a taxonomy of hybrid metaheuristics is presented in an attempt to provide a common terminology and classification mechanisms. The taxonomy, while presented in terms of metaheuristics, is also applicable to most types of heuristics and exact optimization algorithms.

As an illustration of the usefulness of the taxonomy an annoted bibliography is given which classifies a large number of hybrid approaches according to the taxonomy.

A Taxonomy of Hybrid Metaheuristics

We consider a fully SAT-based method of unbounded symbolic model checking based on computing Craig interpolants. In benchmark studies using a set of large industrial circuit verification instances, this method is greatly more efficient than BDD-based symbolic model checking, and compares favorably to some recent SAT-based model checking methods on positive instances.

Interpolation and SAT-based model checking

The constantly increasing circuit size makes the sequential ATPG problem a challenging area even when simulation-based algorithms are exploited. Several techniques have been proposed which mainly resort to logic simulation, reverting to fault simulation only when strictly required. In this paper we present a new Genetic Algorithm-based test generation method which exploits information coming from a logic simulator (e.g., the circuit activity and the reached states) to guide the search process, in particular in the fault excitation phase. Experimental results show the effectiveness of the proposed method when compared with other Genetic Algorithm-based test generators.

Exploiting logic simulation to improve simulation-based sequential ATPG

The Product Machine and Implicit Enumeration to prove FSMs correct

In order to widen the spectrum of available products, companies involved in space electronics are exploring the possible adoption of COTS components instead of space-qualified ones. However, the adoption of COTS devices and boards requires suitable solutions able to guarantee the same level of dependability. A mix of different solutions can be considered for this purpose. Test techniques play a major role, since they must guarantee that a high percentage of permanent faults can be detected (both at the end of the manufacturing and during the mission) while matching several constraints in terms of system accessibility and hardware complexity. In this paper we focus on the test of the electronics used within launchers, and outline an approach based on Software-based Self-test. The proposed solutions are currently being adopted within the MaMMoTH-Up project, targeting the development of an innovative COTS-based system to be used on the Ariane5 launcher. The approach aims at testing both the OR1200 processor and the different peripheral modules adopted in the system, while providing new techniques for the identification of safe faults. The results show the effectiveness and current limitations of the method, also including a comparison between functional and structural test approaches.

Improved Test Solutions for COTS-Based Systems in Space Applications

In safety-critical systems, power electronics is widely used, e.g., for driving actuators. High currents and high voltages are often used in power electronics, which may cause considerable heating of the power devices. Hence, different mechanisms for heat dissipation and cooling of power devices are adopted. An excessive temperature increase in the power devices may lead to considerable electrical and mechanical stresses, and overheated electrical devices are subject to more rapid ageing. Therefore, an incorrect behaviour of the dissipation system can seriously damage or even block a safety-critical system. Hence, it is necessary to introduce test mechanisms to check the correct behaviour of the heatsinks. In this paper, we propose a strategy to quantitatively evaluate the effectiveness of a test for the dissipation system. The proposed approach is based on an electrothermal model of the cooling system. It allows one to identify the maximum size of the thermal fault tolerated by the dissipation system before the electrical device break down.

Matteo Sonza Reorda

Papers

Exploiting logic simulation to improve simulation-based sequential ATPG

The Product Machine and Implicit Enumeration to prove FSMs correct

Improved Test Solutions for COTS-Based Systems in Space Applications

Testing Heatsink Faults in Power Transistors by means of Thermal Model

The Use of Benchmarks for High-Reliability Systems