M
Matteo Sonza Reorda
Researcher at Polytechnic University of Turin
Publications - 340
Citations - 5043
Matteo Sonza Reorda is an academic researcher from Polytechnic University of Turin. The author has contributed to research in topics: Fault coverage & Automatic test pattern generation. The author has an hindex of 32, co-authored 295 publications receiving 4525 citations. Previous affiliations of Matteo Sonza Reorda include University of California, Riverside & NXP Semiconductors.
Papers
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Proceedings ArticleDOI
A test pattern generation methodology for low power consumption
TL;DR: An ATPG technique that reduces power dissipation during the test of sequential circuits by 70% on average with respect to the original test pattern, generated ignoring the heat dissipation problem.
Journal ArticleDOI
A new hybrid fault detection technique for systems-on-a-chip
Paolo Bernardi,L. Bolzani,Maurizio Rebaudengo,Matteo Sonza Reorda,Fabian Vargas,Massimo Violante +5 more
TL;DR: A new hybrid approach which combines hardening software transformations with the introduction of an Infrastructure IP with reduced memory and performance overheads is proposed, which targets faults affecting the memory elements storing both the code and the data.
Journal ArticleDOI
Using Benchmarks for Radiation Testing of Microprocessors and FPGAs
Heather Quinn,William H. Robinson,Paolo Rech,Miguel Aguirre,A. Barnard,Marco Desogus,Luis Entrena,Mario Garcia-Valderas,Steven M. Guertin,David Kaeli,Fernanda Lima Kastensmidt,Bradley T. Kiddie,Antonio Sanchez-Clemente,Matteo Sonza Reorda,Luca Sterpone,Michael Wirthlin +15 more
TL;DR: A benchmark suite for high-reliability systems that is designed for field-programmable gate arrays and microprocessors is proposed and the development process is described and neutron test data is reported for the hardware and software benchmarks.
Journal ArticleDOI
GALLO: a genetic algorithm for floorplan area optimization
TL;DR: The proposed Genetic Algorithm for the Floorplan Area Optimization problem is based on suitable techniques for solution encoding and evaluation function definition, effective cross-over and mutation operators, and heuristic operators which further improve the method's effectiveness.
Proceedings ArticleDOI
An Accurate Analysis of the Effects of Soft Errors in the Instruction and Data Caches of a Pipelined Microprocessor
TL;DR: An efficient simulation-based fault injection environment is developed and an extensive analysis of the effects of soft errors on a processor running several applications under different memory configurations is presented.