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Veena Misra
Researcher at North Carolina State University
Publications - 251
Citations - 5283
Veena Misra is an academic researcher from North Carolina State University. The author has contributed to research in topics: Gate dielectric & Dielectric. The author has an hindex of 39, co-authored 249 publications receiving 4954 citations. Previous affiliations of Veena Misra include University of North Carolina at Chapel Hill & Motorola.
Papers
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Journal ArticleDOI
Dual Floating Gate Unified Memory MOSFET With Simultaneous Dynamic and Non-Volatile Operation
Biplab Sarkar,Narayanan Ramanan,Srikant Jayanti,Neil Di Spigna,Bongmook Lee,Paul D. Franzon,Veena Misra +6 more
TL;DR: In this paper, a dual floating gate flash memory has been fabricated and characterized to show dynamic operation, nonvolatile operation, and simultaneous dynamic and non-volatile operations, which can combine DRAM and flash functionality in the same device.
Patent
High/low work function metal alloys for integrated circuit electrodes
TL;DR: In this article, a common material system may be used for gate electrodes for both NMOS and PMOS devices, which can include gate electrodes of an alloy of the first metal and the second metal having lower work function than the first one.
Proceedings ArticleDOI
Dependence of pmos metal work functions on surface conditions of high-k gate dielectrics
TL;DR: The effective work function of PMOS metal gate electrode as a function of intentionally altered HfO2 surfaces was investigated in this article, where the impact of capping layers, diffusion barriers and interfacial layers on the final work function was also examined.
Journal ArticleDOI
Investigation of work function tuning using multiple layer metal gate electrodes stacks for complementary metal-oxide-semiconductor applications
TL;DR: In this article, metal gate electrodes consisting of three layered stacks of metals are investigated for complementary metal-oxide-semiconductor device applications, and it was observed that the effective work function of the entire gate electrode stack was dominated by the first metal layer (50A of tantalum nitride) contacting the gate dielectric.
Journal ArticleDOI
Investigation of Lanthanum Silicate Conditions on 4H-SiC MOSFET Characteristics
TL;DR: In this paper, the impact of post deposition annealing (PDA) conditions and the initial lanthanum oxide (La2O3) thickness on the performance of 4H-silicon carbide (SiC) MOSFETs was studied.