Codex Corporation

About: Codex Corporation is a based out in . It is known for research contribution in the topics: Signal & Network packet. The organization has 189 authors who have published 241 publications receiving 32205 citations.

Arbitration scheme for resolving access to a shared resource between a plurality of requestors

Abstract: A technique is described for arbitrating access to a resource among a number of requestors that share the resource according to a predetermined access priority. Each requestor is assigned an impedance in a voltage divider that comprises a string of interconnected impedances, each impedance being positioned in the voltage divider in accordance with the access priority of the requestor to which it is assigned. Each requestor contends for access to the shared resource by driving one side of its assigned impedance to a predetermined (e.g., ground) potential and detecting the resultant potential present at the other side of the assigned impedance to determine if the requestor has won the arbitration for access to the resource.

A custom VLSI architecture for the CCITT wideband coding standard

Abstract: A custom VLSI architecture for implementing the CCITT G.722 64-kb/s (7-kHz) wideband audio coding standard is presented. By tailoring the architecture to the algorithm, an architecture was designed that is capable of processing a full duplex channel in less than 625 cycles. That is 71-73% less cycles than are required by the reported general-purpose DSP implementations. In a 1.5- mu technology with a 100-ns cycle time, it is estimated that the architecture would consume 95000 mL/sup 2/ of silicon and support two full duplex channels on a single chip. The authors wrote a behavioral simulation of the architecture and its implicit microcode. This simulates the architecture's behavior at the bit level. The simulation passes the CCITT G.722 test vectors, demonstrating that the implementation conforms to the standard. >

PCB assembly mfr. permitting wave soldering

Abstract: The PCB manufacturing method comprises the steps of forming conductors on one surface of the PCB. The PCB having a component side and a solder side. Two sets of plated-through holes are formed in the PCB. A mask layer is deposited on the solder side of the PCB such that the first set of holes are covered and the second set of holes are exposed. Components are inserted onto the component side of the PCB using the second set of holes. The solder side of the PCB is passed over a solder wave thereby soldering the second set of holes an components. Conductive pins are inserted into the first set of holes so that the pins project outward from both the component and solder sides of the PCB, the pins dimensioned to make a press fit into the first set of holes so that electrical contacts are formed.

Apparatus and method using shift registers for generation of a bias voltage for a VCO in a phase locked loop

Abstract: of EP0614275A bias voltage (26) for a VCO (20) is generated by monitoring UP and DOWN control signals to a charge pump (14) and generating first and second output signals upon detecting a predetermined number of consecutive UP pulses or DOWN pulses. The first output signal causes a shift register (64) pre-loaded with a data pattern having one odd logic state to shift one bit location to left, while the second output signal moves the odd logic state one bit location to the right. The bias voltage to the VCO is selected based on the odd logic state bit location. Any variation in VCO output frequency due to intermittent ground bounce is eliminated by requiring a consecutive number of UP pulses or DOWN pulses before moving the VCO bias point.