Yeshwantrao Chavan College of Engineering

About: Yeshwantrao Chavan College of Engineering is a based out in . It is known for research contribution in the topics: Inverter & Microstrip antenna. The organization has 632 authors who have published 586 publications receiving 4037 citations.

Classification of MRI Brain Images Using Cosine-Modulated Wavelets

Abstract: This paper presents technique for the classification of the MRI images of human brain using cosine modulated wavelet transform Better discrimination and low design implementation complexity of the cosine-modulated wavelets has been effectively utilized to give better features and more accurate classification results The proposed technique consists of two stages, namely, feature extraction, and classification In the first stage, the energy features from MRI images are obtained from sub-band images obtained after decomposition using cosine modulated wavelet transform In the classification stage, Bays classifier is used to classify the image as normal or abnormal Average Classification accuracy with a success rate of 100% has been obtained

Integrated three-level NPC based DSTATCOM topology using MISCT control algorithm for load compensation with non-stiff source

Abstract: In this paper, a three-level neutral-point-clamped (NPC) inverter based filter capacitor supported integrated distribution static compensator (DSTATCOM) topology is proposed for load compensation using modified control algorithm. A three-phase four wire low voltage distribution system is taken into consideration with non-stiff source. The suggested topology is realized using three-level NPC voltage source inverter (VSI) with series capacitor to reduce dc link voltage and shunt capacitor to eliminate the high frequency switching components. In addition, a positive sequence component extraction based modified instantaneous symmetrical component theory is also suggested for load compensation (MISCT) in non-stiff system. Various DSTATCOM configurations are analyzed based on the filter capacitor combinations using MISCT and compared with conventional instantaneous symmetrical component theory (CISCT) for DSTATCOM applications, using hysteresis pulse width modulation (PWM). The performance analysis carried through an extensive MATLAB simulation shows excellent improvement in load compensation with significantly lower total harmonic distortion (THD) and reduced switching components in the terminal voltage for integrated DSTATCOM structure with series and shunt filter capacitor using MISCT.

Three operand fused floating point add-subtract unit using redundant adder

Abstract: In this paper an efficient fused three operand floating point add-subtract unit is designed using Binary Signed Digit (BSD) adder. BSD adder-subtractor improves overall speed of addition due to its carry limited operation. BSD adder delay reduces by 28% and 17% compared to carry save adder (CSA) and ripple carry adder (RCA) respectively. Three operand adder performs two additions in a single unit which reduces overall critical path compared to discrete and two term computation. It shows 25% reduction in delay and 14% reduction in area compared to three term computation using discrete unit. It will be an enhanced way-out for most of the algorithms with multiple additions.

Positive sequence ISCT based distribution static compensator for non-stiff source using state feedback control

Abstract: This paper proposes positive sequence extraction based state feedback theory for neutral clamped voltage source inverter (VSI) based Distribution Static Compensator (D-STATCOM) for three phase, four wire, non-stiff system. Generally, in stiff system, the instantaneous symmetrical component theory is used to generate the reference compensator currents. However, this is not useful directly in non-stiff systems. In order to improve the compensator performance for non-stiff source and to achieve desired load compensation, positive sequence extraction based state feedback using Linear Quadratic Regulator (LQR) is proposed. The switching sequence for VSI is generated using hysteresis current control (HCC) technique and for effectively nullifying the high frequency switching components from terminal voltages and source currents, shunt filter capacitors are used. The results are verified for unbalanced and nonlinear load condition. The proposed theory gives desired load compensation with the undistorted terminal voltages under balanced source conditions. The results are extracted using extensive digital simulations performed in MATLAB/SIMULINK environment.