Institution
Yeshwantrao Chavan College of Engineering
About: Yeshwantrao Chavan College of Engineering is a based out in . It is known for research contribution in the topics: Inverter & Microstrip antenna. The organization has 632 authors who have published 586 publications receiving 4037 citations.
Papers published on a yearly basis
Papers
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01 Feb 2017TL;DR: In this article, the effect and relation of various parameters on cooling efficiency with minimum water and power consumption by Direct Evaporative Cooler has been carried out on the effect of temperature and humidity.
Abstract: The present research work has been carried out on the effect and relation of various parameters on cooling efficiency with minimum water and power consumption by Direct Evaporative Cooler. In this paper the emphasis has been given on the steady flow zone detection in wind tunnel with wet cooling pad of wood wool. The paper presents the experimental results for a 15 and 25 mm thick wet cooling pad. The experimental result shows the steady flow of air has been 340 mm away in wind tunnel with cooling pad. The experimental results have been used to measure cooling efficiency and water consumption with respect to unsteady and steady flow zone.
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01 Jan 2018TL;DR: The ITDA is presented, which aims to provide the support for absorption of data, modeling it in multidimensional model, analyzing the absorbed data, and producing effective visualization, so that target users can do analysis on their data without relying on costly tools or any prior knowledge in programming.
Abstract: Recent developments in real-time applications, sensor technology, and various online services are responsible for generating large amount of data which can be used for analysis. Performing multidimensional data analysis on such type of data requires aggregation at various levels which is generally done using data cubes. Generation of data cubes involves lot of storage and time overheads which make such approach practically less feasible if aggregation involves lot of hierarchies in dimensions. The Integrated Tool for Data Analysis (ITDA) project aims to provide a data analytics solution, under single Web-based platform to address the issue of generating the cube for high volume data by proposing the ‘on-the-fly aggregation’ architecture. This paper presents the ITDA which aims to provide the support for absorption of data, modeling it in multidimensional model, analyzing the absorbed data, and producing effective visualization. Target users can do analysis on their data without relying on costly tools or any prior knowledge in programming. In this paper, detailed architecture of ITDA software with its operating mode is discussed.
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01 Nov 2016TL;DR: In this article, the authors analyzed voltage stability on DSSC compensated system and found the optimum number of DSSCs to be connected on existing line to remove transmission overloads using Particle Swarm Optimization.
Abstract: FACTS Technology makes transmission grid more smart and controllable. Distributed Static Series Compensator (DSSC) is a Distributed FACTS device and it can be attached directly on existing transmission line to provide cost effective power flow control through line. DSSC alters line reactance and provides reactance compensation in inductive and capacitive mode of operation. In this paper voltage stability is analyzed on DSSC compensated system. Optimum number of DSSC devices to be connected on existing line is found to remove transmission overloads using Particle Swarm Optimization. The objective of optimization problem is written such that no transmission line overloads, network losses reduces and compensation becomes cost effective. Voltage stability is studied on IEEE-14 bus system compensated by optimum number of DSSC devices operating in inductive and capacitive mode. Maximum loading point is calculated by solving continuation power flow using MATLAB.
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01 Aug 2016TL;DR: Examination of quaternary and binary system demonstrates promising methodology towards lowering interconnect, and coding for Quaternary blocks is done and actualized on FPGA in this work.
Abstract: Quaternary logic offers representation of digits very minimalistically. Hardware required to store, process such data is still a test. Combinational and sequential block are composed in this work. Work includes making libraries for Quaternary framework, Making packages for elements of Quaternary framework and lastly creating configuration for function. Coding for Quaternary blocks is done and actualized on FPGA in this work. Examination of quaternary and binary system demonstrates promising methodology towards lowering interconnect.
Authors
Showing all 632 results
Name | H-index | Papers | Citations |
---|---|---|---|
Aniket Kale | 15 | 52 | 1028 |
Milind M. Mushrif | 12 | 37 | 633 |
Madhuri A. Chaudhari | 11 | 53 | 403 |
Rakesh L. Shrivastava | 11 | 26 | 552 |
P. M. Meshram | 10 | 24 | 822 |
Mukesh M. Raghuwanshi | 10 | 64 | 423 |
Chandrashekhar Meshram | 9 | 51 | 207 |
Pravin Dakhole | 9 | 56 | 232 |
S. P. Gawande | 9 | 47 | 263 |
Ujwalla Gawande | 9 | 21 | 344 |
Sandeep Kakde | 9 | 45 | 260 |
Naveen K. Shrivastava | 8 | 18 | 287 |
Kavita R. Singh | 8 | 28 | 215 |
A. S. Gandhi | 8 | 48 | 240 |
Kishor K. Bhoyar | 8 | 28 | 204 |