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Journal ArticleDOI

A 0.3-V Pseudo-Differential Bulk-Input OTA for Low-Frequency Applications

TLDR
This paper presents an ultra-low-voltage high-performance bulk-input pseudo-differential operational transconductance amplifier for low-frequency applications and uses the amplifier to design a tunable second-order Gm-C low-pass filter.
Abstract
This paper presents an ultra-low-voltage high-performance bulk-input pseudo-differential operational transconductance amplifier for low-frequency applications. The proposed amplifier is designed using standard 65-nm CMOS technology and powered from 0.3-V supply with a stand by current consumption of 170-nA. Post-layout simulations with a load capacitance of 5 pF have been performed to validate the performance of the proposed amplifier. The proposed amplifier exhibits a DC gain of 60 dB and a phase margin of 53 $$^\circ $$ at unity gain frequency of 70 kHz for a load of 5 pF. The proposed OTA has shown improvement of five times and more than 2.5 times in small-signal and large-signal performance, respectively, when compared to the state of the art. In addition, the proposed transconductance amplifier is used to design a tunable second-order $$G_m{\text {-}}C$$ low-pass filter. Simulation results show that tunable cutoff frequency is varying from 4 to 190 kHz which is obtained by varying the input-stage bias current from 1 to 200 nA.

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Citations
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Journal ArticleDOI

Ultra-Low-Voltage Inverter-Based Operational Transconductance Amplifiers with Voltage Gain Enhancement by Improved Composite Transistors

TL;DR: In this paper, the authors proposed topological enhancements to increase voltage gain of ultra-low-voltage (ULV) inverter-based OTAs, which rely on adoption of composite transistors and forward-body-biasing.
Journal ArticleDOI

A 0.3 V Rail-to-Rail Ultra-Low-Power OTA with Improved Bandwidth and Slew Rate

TL;DR: A novel operational transconductance amplifier (OTA) topology based on a dual-path body-driven input stage that exploits a body- driven current mirror-active load and targets ultra-low-power (ULP) and ultra- low-voltage (ULV) applications, such as IoT or biomedical devices.
Journal ArticleDOI

Dynamic and Static Calibration of Ultra-Low-Voltage, Digital-Based Operational Transconductance Amplifiers

TL;DR: In this paper, the effects of process variations and device mismatch in ULTV Digital-Based Operational Transconductance Amplifiers (DB-OTAs) are addressed and two dynamic calibration techniques, intended to dynamically vary the effective strength of critical gates by different modulation strategies, are explored and compared to classic static calibration.
Journal ArticleDOI

A Tree-Based Architecture for High-Performance Ultra-Low-Voltage Amplifiers

TL;DR: The proposed tree-based OTA is a good candidate to implement ULV, ULP, high performance analog building blocks for directly harvested IoT nodes and robustness against PVT variations and mismatch is confirmed.
Journal ArticleDOI

A 0.4 V, body-driven, fully differential, tail-less OTA based on current push-pull

TL;DR: The proposed structure arranges the current push-pulls as the core amplifier blocks in an elaborate manner to achieve fully differential function with tail-less power optimized elements to reduce the power consumption of proposed structure down to 0.3 ​μW.
References
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Book

CMOS Analog Circuit Design

TL;DR: In this article, the authors present a simple MOS LARGE-SIGNAL MODEL (SPICE Level 1) and a small-signal model for the MOS TRANSISTOR.
Journal ArticleDOI

0.5-V analog circuit techniques and their application in OTA and filter design

TL;DR: In this paper, operational transconductance amplifier (OTA) and filter design for analog circuits with very low supply voltages, down to 0.5 V, are presented. But they do not consider the effect of low-voltage analog circuits on the performance.
Journal ArticleDOI

Low voltage analog circuit design techniques

TL;DR: In this paper, some of the issues facing analog designers in implementing low voltage circuits are discussed, and possible low voltage design techniques are examined, along with their merits and demerits.

INVITED PAPER Special Section on Analog Circuits and Related Topics Low Voltage Analog Circuit Design Techniques: A Tutorial

TL;DR: Low voltage analog circuit design techniques are addressed in this tutorial, with a focus on implementation techniques capable to reduce the power supply requirements.
Journal Article

Low Voltage Analog Circuit Design Techniques: A Tutorial

TL;DR: In this paper, low voltage analog circuit design techniques are addressed, including technology considerations, transistor model capable to provide performance and power tradeoffs, low voltage implementation techniques capable to reduce the power supply requirements, such as bulk-driven, floating-gate, and self-cascode MOSFETs; basic LV building blocks; multi-stage frequency compensation topologies; and fully-differential and fully balanced systems.
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