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Journal ArticleDOI

A novel technique to determine the gate and drain bias dependent series resistance in drain engineered MOSFETs using one single device

J.A.M. Otten, +1 more
- 01 Sep 1996 - 
- Vol. 43, Iss: 9, pp 1478-1488
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TLDR
In this paper, a measurement method for the extraction of the source and drain series resistance of drain engineered MOSFETs from their low frequency ac characteristics as a function of gate and drain bias using only one single MOS-FET was presented.
Abstract
A new measurement method is explained for the extraction of the source and drain series resistance of drain engineered MOSFETs from their low frequency ac characteristics as a function of gate and drain bias using only one single MOSFET. Experimental results indicate, the effect of drain voltage dependent series resistance is relevant both in the ohmic and in the saturation region of the MOSFET. In addition the new measurement method is extended in such a way that it can be used to measure the series resistance as a function of gate bias only at low drain bias. Comparison of this single transistor measurement technique with other methods, needing a set of identical transistors with different channel lengths, shows that our method gives equal results. Finally attention is also given to the modeling of the series resistance in the ohmic and saturation region. For both regions simple, accurate compact model expressions have been derived.

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Citations
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Journal ArticleDOI

Impact of fin width on digital and analog performances of n-FinFETs

Abstract: This paper examines the impact of an important geometrical parameter of FinFET devices, namely the fin width. From static and low-frequency measurements on n-FinFETs ( I – V , C – V and 1/ f noise), transistor Figures of Merit in the near-threshold region (like threshold voltage, subthreshold slope, and drain induced barrier lowering); linear region (mobility, series resistance, 1/ f noise) and saturation region (normalized transconductance, early voltage) are analyzed as a function of fin width. In the near-threshold region, fin width is seen to strongly impact the coupling between the back and front gates, while in the above threshold region, the most important impact of fin width is on the parasitic source/drain resistance, which affects different strong inversion parameters to different extents. With the help of analytical expressions, the impact of series resistance on these device parameters is studied, and the contribution from series resistance is de-embedded, enabling extraction of intrinsic device parameters. Significant differences are observed between the intrinsic and extrinsic parameters, especially for short and narrow devices, which also underlines the need for accounting for series resistance effects at every stage of FinFET characterization.
Journal ArticleDOI

Effect of gate-field dependent mobility degradation on distortion analysis in MOSFETs

TL;DR: In this paper, a new model for mobility degradation is introduced which gives a major improvement in distortion analysis in the linear region for both n-type and p-type MOS transistors.
Journal ArticleDOI

A Simple Series Resistance Extraction Methodology for Advanced CMOS Devices

TL;DR: In this paper, a series resistance extraction method based on the ratio of two linear ID-VG measurements is proposed to extract the series resistance from a series of advanced CMOS devices.
Journal ArticleDOI

Two-stage ultrawide-band 5-W power amplifier using SiC MESFET

TL;DR: In this article, a two-stage 5-W broad-band amplifier covering the frequency range from 10 MHz to 2.4 GHz is described. But the authors do not consider the use of a GaAs MESFET as the power stage.
References
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Journal ArticleDOI

Carrier mobilities in silicon empirically related to doping and field

D.M. Caughey, +1 more
TL;DR: In this article, the experimental dependence of carrier mobilities on doping density and field strength in silicon has been investigated and the curve-fitting procedures are described, which fit the experimental data.
Journal ArticleDOI

Rigorous thermodynamic treatment of heat generation and conduction in semiconductor device modeling

TL;DR: A treatment of the self-heating problem is presented, showing that, in the steady state, some of the heuristic models of heat generation, thermal conductivity, and heat capacity could indeed approximate the correct results within an error bound of 1-10%.
Journal ArticleDOI

A New Method to Determine Effective MOSFET Channel Length

TL;DR: In this paper, an accurate and convenient method to determine an effective MOSFET channel length is proposed based on a computer aided evaluation of an intrinsic channel resistance without using special test devices.
Journal ArticleDOI

Gate-voltage-dependent effective channel length and series resistance of LDD MOSFET's

TL;DR: In this article, a measurement algorithm to extract the effective channel length and source-drain series resistance of MOSFET's is presented, which is applicable to both conventional and LDD FET's.
Journal ArticleDOI

Relationship between measured and intrinsic transconductances of FET's

TL;DR: In this paper, the authors derived an equation that allows the calculation of the intrinsic transconductance of a FET from the measured transconductance, under the assumption that source and drain series resistances are independent of bias.
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