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Journal ArticleDOI

Anomalous leakage current in LPCVD PolySilicon MOSFET's

TLDR
The anomalous leakage current I L in LPCVD polysilicon MOSFETs is attributed to field emission via grain-boundary traps in the (front) surface depletion region at the drain, and an analytic model that describes the strong dependences of I L on the gate and drain voltages is developed.
Abstract
The anomalous leakage current I L in LPCVD polysilicon MOSFET's is attributed to field emission via grain-boundary traps in the (front) surface depletion region at the drain, and an analytic model that describes the strong dependences of I L on the gate and drain voltages is developed. The model predictions are consistent with measured current-voltage characteristics. Physical insight afforded by the model implies device design modifications to control and reduce I L , and indicates when the back-surface leakage component is significant.

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Citations
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Journal ArticleDOI

Polycrystalline silicon thin film transistors

TL;DR: In this paper, a-Si precursors are used for the preparation of the material by direct deposition and by crystallization from pre-deposition precursor, and the characterization of the defect-induced trapping states within the material and their passivation is presented.
Journal ArticleDOI

High-performance TFTs fabricated by XeCl excimer laser annealing of hydrogenated amorphous-silicon film

TL;DR: In this article, high performance staggered a-Si:H and poly-Si thin-film transistors (TFTs) fabricated by XeCl excimer laser annealing was discussed.
Journal ArticleDOI

Passivation kinetics of two types of defects in polysilicon TFT by plasma hydrogenation

TL;DR: In this article, the effects and kinetics of hydrogen passivation on polycrystalline-silicon thin-film transistors (poly-TFTs) are investigated.
Journal ArticleDOI

High performance low-temperature poly-Si n-channel TFTs for LCD

TL;DR: In this paper, the conditions for low-pressure chemical vapor deposition of the active layer poly-Si were optimized to achieve low threshold voltage (V/sub TH/) and high field effect mobility ( mu /sub FE/).
Journal ArticleDOI

Characteristics of offset-structure polycrystalline-silicon thin-film transistors

TL;DR: In this article, an offset structure that has an n/sup -/ region between channel and source-drain electrodes has been proposed to reduce anomalous leakage current from n-channel polycrystalline-silicon thin-film transistors.
References
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Proceedings Article

Physics of semiconductor devices

S. M. Sze
Journal ArticleDOI

Transport properties of polycrystalline silicon films

TL;DR: In this article, the transport properties of polycrystalline silicon films are examined and interpreted in terms of a modified grain-boundary trapping model, based on the assumption of both a δ-shaped and a uniform energy distribution of interface states.
Journal ArticleDOI

Design and characteristics of the lightly doped drain-source (LDD) insulated gate field-effect transistor

TL;DR: In this paper, a self-aligned n-regions are introduced between the channel and the n+source-drain diffusions of an IGFET to spread the high field at the drain pinchoff region and thus reduce the maximum field intensity.
Journal ArticleDOI

Tunneling to traps in insulators

TL;DR: In this paper, the tunneling time constant for a three-dimensional δ-function trap is derived and compared with experiments on metal-nitride oxide semiconductor structures, and the results show that the trap can trap in an insulator on top of the metal.
Journal ArticleDOI

Grain boundary states and the characteristics of lateral polysilicon diodes

TL;DR: In this paper, the energy distribution of the traps at the grain boundaries was found to be U shaped, and the forward current of the diodes was attributed to recombination, the reverse current to field-enhanced generation via these traps.
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