Journal ArticleDOI
Attenuation-Predistortion Linearization of CMOS OTAs With Digital Correction of Process Variations in OTA-C Filter Applications
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TLDR
An architectural attenuation-predistortion linearization scheme for a wide range of operational transconductance amplifiers (OTAs) is proposed and demonstrated with a transconductances-capacitor (G<sub>m</sub>-C) filter, creating a robust architecture.Abstract:
An architectural attenuation-predistortion linearization scheme for a wide range of operational transconductance amplifiers (OTAs) is proposed and demonstrated with a transconductance-capacitor (Gm-C) filter. The linearization technique utilizes two matched OTAs to cancel output harmonics, creating a robust architecture. Compensation for process variations and frequency-dependent distortion based on Volterra series analysis is achieved by employing a delay equalization scheme with on-chip programmable resistors. An OTA design with the proposed broadband linearization method has third-order inter-modulation (IM3) distortion better than -74 dB up to 350 MHz with 0.2V?? input, 70 dB signal-to-noise ratio (SNR) in 1 MHz bandwidth, and 5.2 mW power consumption. The distortion-cancellation technique enables an IM3 improvement of up to 22 dB compared to a commensurate OTA without linearization. A proof-of-concept low-pass filter with the linearized OTAs has a measured IM3 < - 70 dB and 54.5 dB dynamic range over its 195 MHz bandwidth. The standalone OTAs and the filter were fabricated on a 0.13 ?m CMOS test chip with 1.2 V supply.read more
Citations
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Journal ArticleDOI
A 33 MHz 70 dB-SNR Super-Source-Follower-Based Low-Pass Analog Filter
TL;DR: A 4th-order low-pass continuous-time analog filter is presented, that is implemented with the cascade of two efficient and compact biquadratic cells, realized using the Super-Source-Follower topology.
Journal ArticleDOI
Using Floating Gate and Quasi-Floating Gate Techniques for Rail-to-Rail Tunable CMOS Transconductor Design
Jose M. Algueta Miguel,Antonio J. Lopez-Martin,Lucia Acosta,Jaime Ramirez-Angulo,Ramon G. Carvajal +4 more
TL;DR: This paper illustrates how floating-gate and quasi-floating gate MOS transistors can be efficiently employed by employing them in the design of two transconductors, which have been fabricated in a 0.5 μm CMOS process.
Journal ArticleDOI
A Biquadratic Cell Based on the Flipped-Source-Follower Circuit
TL;DR: This brief presents a novel biquadratic cell (biquad) based on the flipped-source-follower (FSF) circuit, taking advantage of its well-known strengths, like low-output impedance, low-noise, large in-band linearity, and low power.
Journal ArticleDOI
A Power-Efficient Reconfigurable OTA-C Filter for Low-Frequency Biomedical Applications
Sheng-Yu Peng,Yu-Hsien Lee,Tzu-Yun Wang,Hui-Chun Huang,Min-Rui Lai,Chiang-Hsi Lee,Li-Han Liu +6 more
TL;DR: A power-efficient operational-transconductance-amplifier-capacitor (OTA-C) filter for biomedical applications is presented with detailed noise analysis and reconfigurability and performance of the proposed filter is presented.
Journal ArticleDOI
Low-Power ${G}_{{m}}{-}C$ Filter Employing Current-Reuse Differential Difference Amplifiers
TL;DR: This paper deals with the design of low-power high-performance continuous-time filters that employs current-reuse differential difference amplifiers in order to produce more power-efficient ${G}_{{m}}{-}{C}$ filter solutions.
References
More filters
Journal ArticleDOI
CMOS transconductance amplifiers, architectures and active filters: a tutorial
TL;DR: In this article, an updated version of a 1985 tutorial paper on active filters using operational transconductance amplifiers (OTAs) is presented, and the integrated circuit issues involved in active filters (using CMOS transconductances amplifiers) and the progress in this field in the last 15 years is addressed.
Journal ArticleDOI
Highly linear receiver front-end adopting MOSFET transconductance linearization by multiple gated transistors
TL;DR: In this article, a high-level linear receiver RF front-end adopting MOSFET transconductance linearization by linearly superposing several common-source FET transistors in parallel (multiple gated transistor, or MGTR), combined with some additional circuit techniques are reported.
Journal ArticleDOI
A Single–Chip 10-Band WCDMA/HSDPA 4-Band GSM/EDGE SAW-less CMOS Receiver With DigRF 3G Interface and ${+}$ 90 dBm IIP2
TL;DR: This paper describes the design and performance of a 90 nm CMOS SAW-less receiver with DigRF interface that supports 10 WCDMA bands and 4 GSM bands and results in current drain and die area savings as well as improved noise.
Journal ArticleDOI
Solution to trapped charge in FGMOS transistors
TL;DR: In this paper, a solution to the problem of charge being trapped on the gate of a floating gate MOS transistor during fabrication is presented, which does not alter the floating nature of the gate since it does not use any kind of active or passive device to get rid of the accumulated charge.
Journal ArticleDOI
A 4.1-mW 10-MHz Fourth-Order Source-Follower-Based Continuous-Time Filter With 79-dB DR
TL;DR: Due to the intrinsic feedback present in any source-follower, the proposed cell performs larger linearity for smaller Vov(=VGS-VTH).