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Design and demonstration of integrated micro-electro-mechanical relay circuits for VLSI applications

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The article was published on 2013-01-01 and is currently open access. It has received 147 citations till now. The article focuses on the topics: Electrical engineering technology & Very-large-scale integration.

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Citations
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Journal ArticleDOI

3-D Sequential Integration: A Key Enabling Technology for Heterogeneous Co-Integration of New Function With CMOS

TL;DR: In this article, the authors report on the main advances enabling the demonstration of functional and performant stacked CMOS-FETs; i.e., wafer bonding, low temperature processes (<;650°C) and salicide stabilization achievements.
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A Retrospective and a Look Forward: Fifteen Years of Physical Unclonable Function Advancement

TL;DR: A retrospective study of problems and solutions encountered in the journey of developing PUF to its current state will foreshadow the challenges and opportunities for future sustainable activities in the field.
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A review of micro-contact physics for microelectromechanical systems (MEMS) metal contact switches

TL;DR: In this article, a review of the important characteristics of the contact interface such as modeling and material choice is discussed. And a brief comparison of actuation methods is provided to show why electrostatic actuation is most commonly used by radio frequency microelectromechanical systems designers.
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Nanoelectromechanical Switches for Low-Power Digital Computing

TL;DR: Recent progress toward scaled relay technology can overcome the energy-efficiency limit of CMOS technology is reviewed, providing an overview of the different relay designs and experimental results achieved by various research groups, as well as of relay-based IC design principles.
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Scaling Limits of Electrostatic Nanorelays

TL;DR: In this paper, the scaling limits of electrostatically actuated nanorelays are explored, and it is shown that adhesion in a nanorelay's contact interface limits its performance with respect to operating voltage, contact resistance, and switching energy.
References
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Journal ArticleDOI

Design of ion-implanted MOSFET's with very small physical dimensions

TL;DR: This paper considers the design, fabrication, and characterization of very small Mosfet switching devices suitable for digital integrated circuits, using dimensions of the order of 1 /spl mu/.
Book

Microsystem Design

TL;DR: In this article, a minor numerical error in going from Eq. 16.39 to eq.16.40 is found, which has an obvious effect on the calculations that follow, increasing the minimum detectable temperature change to about 2 mK.
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Tunneling Field-Effect Transistors (TFETs) With Subthreshold Swing (SS) Less Than 60 mV/dec

TL;DR: In this paper, a 70-nm n-channel tunneling field effect transistor (TFET) with sub-threshold swing (SS) of 52.8 mV/dec at room temperature was demonstrated.
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High-Speed Arithmetic in Binary Computers

TL;DR: Methods of obtaining high speed in addition, multiplication, and division in parallel binary computers are described and then compared with each other as to efficiency of operation and cost.