Proceedings ArticleDOI
Embedded capacitors in the next generation processor
Yongki Min,Reynaldo Alberto Olmedo,Michael J. Hill,Kaladhar Radhakrishnan,Kemal Aygun,Mostafa Kabiri-Badr,Rahul Panat,Sriram Dattaguru,Haluk Balkan +8 more
- pp 1225-1229
TLDR
Intel in collaboration with its suppliers has developed and commercialized a disruptive embedded capacitor technology that provides significant power delivery benefits for high performance computer applications and is the first commercialized embedded capacitors used by Intel.Abstract:
Embedded passives technology has been of interest to electronic package designers for performance improvement and package size reduction. With the explosion of mobile phones, tablets and other hand held devices, the need for smaller form factor products with equivalent or better electrical performance makes a very compelling case for embedding passives. The benefits of embedded passives are not limited to small form factor devices. Larger die and server products requiring high performance power delivery solutions can also benefit substantially from embedded capacitors. Intel in collaboration with its suppliers has developed and commercialized a disruptive embedded capacitor technology that provides significant power delivery benefits for high performance computer applications. This is the first commercialized embedded capacitor technology used by Intel.read more
Citations
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Journal ArticleDOI
Power Delivery for High-Performance Microprocessors—Challenges, Solutions, and Future Trends
TL;DR: In this paper, the authors discuss the pros and cons of different types of integrated voltage regulators (IVRs) as well as the technology ingredients required to meet future IVR requirements.
Journal ArticleDOI
System Scaling With Nanostructured Power and RF Components
TL;DR: The impact of nanostructured materials toward enhancing the performance and miniaturization of power and radio-frequency (RF) passive components in emerging smart systems is shown.
Journal ArticleDOI
3-D CMOS Chip Stacking for Security ICs Featuring Backside Buried Metal Power Delivery Networks With Distributed Capacitance
Kazuki Monta,Hiroki Sonoda,Takaaki Okidono,Yuuki Araga,Naoya Watanabe,Haruo Shimamoto,Katsuya Kikuchi,Noriyuki Miura,Takuji Miki,Makoto Nagata +9 more
TL;DR: In this paper, a 3D stack of complimentary metaloxide-semiconductor (CMOS) integrated circuit (IC) chips for security applications monolithically embed backside buried metal (BBM) routing with low series impedance and high decoupling capability in a power delivery network (PDN), thanks to distributed capacitances over a full-chip backside area.
Journal ArticleDOI
CMOS compatible on-chip decoupling capacitor based on vertically aligned carbon nanofibers
TL;DR: In this paper, an on-chip decoupling capacitor of specific capacitance 55 pF/mu m(2) (footprint area) which is 10 times higher than the commercially available discrete and onchip (65 nm technology node) decoupled capacitors is presented.
Proceedings ArticleDOI
Heterogeneous Power Delivery for 7nm High-Performance Chiplet-Based Processors Using Integrated Passive Device and In-Package Voltage Regulator
Alan Roth,Charlie Zhou,Mei Wong,Eric Soenen,Tze-Chiang Huang,Paul Ranucci,Ying-Chih Hsu,Hung-Chih Lin,C. H. Kuo,Min-Jer Wang,Sheng-Yao Yang,J.R. Chu,Ting-Yu Yeh,Kai-Yuan Ting,Alvin Leng Sun Loke,Stefan Rusu,Mark Chen,Frank Lee,Kevin Zhang,Alex Kalnitsky +19 more
TL;DR: Two heterogeneous solutions to improve power delivery to High-Performance Computing (HPC) processors are demonstrated, including a laterally mounted in-Package Voltage Regulator built in 28nm CMOS augmented with high-per-meability on-die inductors.
References
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Proceedings ArticleDOI
Measurement-to-modeling correlation of the power delivery network impedance of a microprocessor system
TL;DR: An automated system for measuring the power delivery impedance profile on a functional system is presented in this paper, where the data collected by this system is used to assess the accuracy of a distributed power delivery system model.