Showing papers on "Biasing published in 1994"

Ultrasonic surgical handpiece and an energy initiator

Abstract: An ultrasonic oscillator drives a tool at a set frequency. An amplitude control runs the oscillator to set the vibration level. A frequency regulator joins the amplitude and the oscillator. A control feedback loop, in the frequency regulator, keeps handpiece linear dynamics. An operational transconductance amplifier, in the oscillator, governs gain of the loop. A circuit connects to the control to retard the rate of current application over time to the amplifier. The circuit has switching to either retard the rate or reset for start up. The amplifier is a current output device with current directly proportional to the bias current and input voltage with bias as gain change for the loop. The circuit limits the bias to the amplifier to modify frequency response and output current. A capacitor delays application of the bias to the amplifier. Replaceable tools of various lengths or shapes positioned along an axis vibrate for surgery at the frequency and a wave length. Tools longer than one wavelength and of configurations tuned to oscillate around the frequency resonate as a function of their material, length and configuration. A flue surrounds the tool and has a hollow elongate semi rigid central body about an axis with a funnel, at one end thereof and a nozzle, at the other to direct annular irrigant/coolant flow therethrough. The funnel and nozzle are resilient. Reinforcing ridges, inside the nozzle, act to maintain concentricity between the flue and nozzle tip and channel irrigant thereabout.

Electronic domain pinning in Pb(Zr,Ti)O3 thin films and its role in fatigue

Abstract: Switchable polarization can be significantly suppressed in Pb(Zr,Ti)O3 thin films by optical, thermal, and electrical processes. The optical (thermal) suppression effects occur by biasing the ferroelectric near the switching threshold and illuminating the material with band‐gap light (heating the material to ≊100 °C). The electrical suppression effect, commonly known as electrical fatigue, occurs by subjecting the ferroelectric to repeated polarization reversals. It is found that the suppressed polarization in all three cases can be restored to essentially its initial polarization value by injecting electronic charge carriers into the ferroelectric. This strongly suggests that all three forms of degradation involve locking domains by electronic charge trapping centers.

Fluorocarbon high‐density plasmas. II. Silicon dioxide and silicon etching using CF4 and CHF3

Abstract: We report a study of the application of CF4 and CHF3 electron cyclotron resonance (ECR) discharges to selective etching of SiO2 over Si. Due to significant fluorocarbon film deposition for plasma operation without rf sample bias in the pressure range below 10 mTorr, rf biasing is required for etching of SiO2 and Si. The rf threshold voltage for etching is 55 V for CHF3 and 35 V for CF4 at a pressure of 1 mTorr. At 100 V rf bias, silicon dioxide etch rates were greater than ≂600 nm/min in CF4 and 450 nm/min for 1000 W plasmas at 1 mTorr pressure. A plot of the oxide etch rate vs rf bias exhibits a fluorocarbon film suppression regime at low rf voltages and an oxide sputtering regime at higher rf voltages. In the fluorocarbon suppression regime, the etch rate is primarily determined by fluorocarbon deposition which results in a thin fluorocarbon film being present on the SiO2 surface during steady‐state etching. In the oxide sputtering regime, the oxide etch rate increases linearly with the ion current to t...

Pulsed source ion implantation apparatus and method

Abstract: A new pulsed plasma-immersion ion-implantation apparatus that implants ions in large irregularly shaped objects to controllable depth without overheating the target, minimizing voltage breakdown, and using a constant electrical bias applied to the target. Instead of pulsing the voltage applied to the target, the plasma source, for example a tungsten filament or a RF antenna, is pulsed. Both electrically conducting and insulating targets can be implanted.

Structure and method for low current programming of flash EEPROMs

Abstract: A system and method for programming non-volatile memory enables fast low current programming. Low current programming is achieved by applying a source bias voltage and increasing the drain voltage to be greater than the source bias voltage to maintain fast programming. Furthermore, the control gate voltage may be stepped or ramped from a minimum value to a maximum value to further reduce the peak channel current and to allow the flash cell threshold voltage to be placed to an exact value, for MLC applications. Ramping or stepping of the control gate may be done independently or in conjunction with an applied source bias voltage. Furthermore, the reduced cell current allows more cells to be programmed in parallel which improves program performance and the drain select device can be reduced in size to reduce die area.

Effect of vacuum arc deposition parameters on the properties of amorphous carbon thin films

Abstract: Hard and smooth films of amorphous carbon with thicknesses in the nanometer to micrometer range were formed on silicon substrates using a vacuum arc deposition technique In this technique, a carbon plasma is generated by a vacuum arc plasma source coupled with a magnetic filter for obtaining macroparticle-free amorphous carbon films The influence of the substrate bias voltage and pulsed bias duty cycle on the film properties was investigated A significant enhancement of the film quality and adhesion was achieved by applying a negative pulsed bias voltage to the substrate Nanoindentation, pin-on-disk tribotesting, surface profilometry, Rutherford backscattering spectroscopy, elastic recoil spectroscopy, and Raman spectroscopy were used to characterize the properties and structure of the amorphous carbon films It was found that the hardest films with the highest density and lowest friction coefficient were obtained at - 100 V pulsed bias voltage, whereas higher pulsed bias voltages improved the film adhesion and reduced the internal stress For -100 V pulsed bias voltage, the maximum film hardness was achieved with a 50% duty cycle, and was significantly higher than that produced with a dc bias

Milliwatt output levels and superquadratic bias dependence in a low‐temperature‐grown GaAs photomixer

Abstract: A cw output power up to 08 mW is obtained from a low‐temperature‐grown (LTG) GaAs, 03 μm gap, interdigitated‐electrode photomixer operating at room temperature and pumped by two modes of a Ti:Al2O3 laser separated in frequency by 02 GHz The output power and associated optical‐to‐electrical conversion efficiency of 1% represent more than a sixfold increase over previous LTG‐GaAs photomixer results obtained at room temperature A separate LTG‐GaAs photomixer having 06 μm gaps generated up to 01 mW at room temperature and up to 4 mW at 77 K Low‐temperature operation is beneficial because it reduces the possibility of thermal burnout and it accentuates a nearly quartic dependence of output power on bias voltage at high bias The quartic dependence is explained by space‐charge effects which result from the application of a very high electric field in the presence of recombination‐limited transport These conditions yield a photocurrent‐voltage characteristic that is very similar in form to the well‐known Mott–Gurney square‐law current in trap‐free solids

Single-polysilicon cmos active pixel

Abstract: The single-polysilicon active pixel comprises a photo site located on a substrate for generating and storing charge carriers, the charge carriers being generated from photonic energy incident upon the photo site and semiconductor substrate, a photo gate, a transfer transistor and output and reset electronics. The gate of the transfer transistor and the photo gate are defined in a single layer of polysilicon disposed on the semiconductor substrate. The source of transfer transistor is a doped region of substrate, referred to as a coupling diffusion, which provides the electrical coupling between the photo gate and the transfer transistor. The coupling diffusion allows for the transfer of a signal stored in a photo site under the photo gate to the output electronics for processing. The single-polysilicon active pixel may be operated by biasing the transfer transistor to the low operating voltage of the pixel, for example, 0 volts. By virtue of the structure of the single-polysilicon active pixel, this mode of operation results in the same timing as if the transfer transistor were clocked, but neither a clock nor the associated driving circuitry are required. However, there is little no tendency for image lag as occurs in double polysilicon active pixels when they are operated in a manner which avoids clocking the transfer gate.

Piezoresistive input device

Abstract: An input device for computers or electronic games using piezoelectric elements. Four piezoelectric devices are mounted on a base in positions ninety degrees apart. A user actuation element, such as a directional control pad and or a joystick is pivotally disposed on the base above the piezoelectric sensors. A biasing element such as a spring, foam or rubber element is positioned between the actuation element and the base to support the actuation device in a neutral position when no face is being applied by a user to also return the activation element to its neutral position after a user's force is removed. Opposing sensors are connected to a bridge circuit such that in the neutral position of the actuation element the output voltage of the bridge is one half of the input voltage. As the user applies a force to the actuation device, the resistance of one or the other (opposing) piezoresistive device will decrease and accordingly drive the output of the bridge circuit either towards the input voltage or ground, depending on which sensor the user is activated. Additionally a piezoresistive device constructed according to the present invention uses a conductive foam overlayed on top of a series of circuit traces which describe open circuits. As the conductive foam is compressed, it will complete the circuit of the circuit traces and provide an output voltage varying with the compression of the foam.

Multistability of the current‐voltage characteristics in doped GaAs‐AlAs superlattices

Abstract: Electric‐field domain formation in doped semiconductor superlattices leads to sharp discontinuities in the current‐voltage (I‐V) characteristic. The successive expansion of the high‐field region with increasing bias voltage through the periodic heterostructure manifests itself in a regular sequence of stable current branches. The current shows a complex hysteretic behavior. We observe two, three, and more stable current levels for fixed bias voltages. Calculations of the I‐V characteristic based on a microscopic model support the experimentally observed multistability.

First-principles theory of atom extraction by scanning tunneling microscopy.

Abstract: A new method to provide a self-consistent electronic structure, field, and current distribution for an atomistic bielectrode system with applied bias voltages is presented. In our method the scattering waves are calculated by a step-by-step recursion-matrix method and two different Fermi levels are assigned to each electrode in accord with a given applied bias voltage. The method is applied to the scanning tunneling microscope (STM) system around the contact region. The tip-surface chemical interaction induced by the electric fields is shown to be important for the extreme specificity of atom extraction by STM.

Optical short pulse generating device

Abstract: An optical short pulse generating device is disclosed, in which semiconductor laser light of a fixed intensity is launched into a first semiconductor electroabsorption optical modulator which is driven by a 0V or forward bias voltage and a sinusoidal voltage, and the output light from the first optical modulator is launched into a second electroabsorption optical modulator to which is applied a bias voltage and a sinusoidal voltage having delayed from the said sinusoidal voltage for a period of time corresponding to the phase reversal thereof, whereby it is possible to generate optical short pulses of a repetition frequency twice higher than the oscillation frequency of a sinusoidal voltage generator.

Elevation aperture control of an ultrasonic transducer

Abstract: An ultrasonic transducer for controlling an elevation aperture utilizes the electric field-induced polarization properties of relaxor ferroelectric materials. The Curie temperature of the material is typically close to room temperature, so that the application of a bias voltage provides piezoelectric activity. By varying the thickness of a dielectric layer that spaces apart the relaxor ferroelectric material from an electrode or providing the bias voltage, the piezoelectric activity can be tailored. That is, degrees of polarization of the relaxor ferroelectric material are varied spatially in correspondence with changes in thickness of the dielectric layer. The effective elevation aperture of the transducer can be varied by adjusting the bias voltage.

Annealing of degraded npn-transistors/spl minus/mechanisms and modeling

Abstract: We report on the annealing of degraded npn-transistors, which includes a new model describing the decrease of base current during annealing. We found that two mechanisms are responsible for annealing: the recombination of charges and the bonding of hydrogen atoms on interface traps. Furthermore, we show that a heating of the whole device and a forward biasing of the emitter-base-diode activate these annealing mechanisms. This biasing deactivates the interface traps by recombination with a part of the streaming charge and results in a local increase in temperature, caused by the current. Both local and global heating yield an additional thermal generation of charges and an increasing diffusivity of hydrogen atoms. Consequently, an additional deactivation and passivation of interface traps is detected. >

Dynamic logic circuit with reduced charge leakage

Abstract: A dynamic logic circuit with reduced charge leakage includes a dynamic complementary MOSFET logic circuit with a P-type MOSFET, a number of N-type MOSFETs and a static CMOSFET inverter circuit. In response to a low clock signal, the P-type MOSFET turns on and charges the precharge node to a precharged node voltage. Some of the N-type MOSFETs are interconnected to form a logic circuit to logically process incoming logic signals and in accordance therewith selectively provide a conduction path for electrical charges from the precharge node. In response to a high clock signal, another N-type MOSFET turns on and together with the logic circuit conditionally discharges the precharge node via the logic circuit conduction path to a discharged node voltage. The value of the discharged node voltage is intermediate to the precharged node voltage and the circuit reference node voltage (e.g. VSS=0). The inverter circuit inverts and buffers the precharged and discharged node voltages. In one embodiment, a bias voltage source, connected between the N-type discharge MOSFET and the reference node, provides a bias voltage which is intermediate to the precharged and reference node voltages, and the discharged node voltage is approximately equal to the bias voltage. In another embodiment, a pull-up MOSFET is connected to the discharge MOSFET for selectively providing a pull-up voltage which is intermediate to the precharged and reference node voltages, and the discharged node voltage is approximately equal to the pull-up voltage.

Common mode early voltage compensation subcircuit for current driver

Abstract: In a driver circuit for a twisted pair cable, a compensator for preventing appreciable common mode current flow into or out of the twisted pair cable in response to the device receiving a wide range of common mode voltage bias levels. A wide range of external bias voltages may be received as a result of variations in the ground node voltages of two coupled devices. The compensator circuit utilizes a feed back loop and monitors the bias voltage received on the twisted pair cable. As the magnitude of the common mode current increases due to external bias voltage variation from a reference bias voltage, the current flow of p-channel transistors, coupled in an arrangement of the present invention, is increased (or decreased, as necessary) so that reduced common mode current flows onto the twisted pair cable. The present invention reduces appreciable common mode current flow through the twisted pair cable from the driver that are due to variations in the external bias voltage between communication devices. The present invention provides high common mode output impedance for the driver circuit by altering the effective common mode common mode early voltage characteristics of the driver circuit while utilizing shorter channel length transistors for high speed communication capacity. The present invention also offers reduced current supply capacity of the common mode bias voltage source. The present invention operates ideally within driver circuits compatible with the IEEE P1394 communication standard.

Recovery rates in semiconductor laser amplifiers: optical and electrical bias dependencies

Abstract: The authors measure the dependence of the gain recovery rate in semiconductor laser amplifiers on optical and electrical bias conditions, and show that rapid recovery is achievable (in times ~10 ps) with modest optical bias powers ( ≤ 50 mW).

Storage cell using low powered/low threshold CMOS pass transistors having reduced charge leakage

Abstract: A storage cell includes a first bit line, a storage circuit, and a pass transistor. The storage circuit has a first storage node for holding a logic state indicative of a logic value. The pass transistor is coupled to the first bit line and the first storage node for establishing a conduction path therebetween. The pass transistor receives a bias voltage to switch the pass transistor into a substantially nonconducting state when the storage cell is not being accessed. The reverse bias on the first transistor substantially reduces the leakage current through the pass transistor.

Photodetector device having a semiconductive conjugated polymer

Abstract: A photodetector device includes a semiconductive conjugated polymer, such as PPV, arranged between first and second electrode layers having different work functions, a bias circuitry connected to apply a bias voltage between the first and second electrode layers, and a sensing circuitry connected to detect a photocurrent flowing between the first and second electrode layers across the polymer layer as a result of radiation incident on the polymer layer while the bias voltage is applied. The bias voltage is selected in relation to the thickness of the polymer layer.

Circuit for controlling current in an adapter card

Abstract: A circuit embodied within an adapter card for hot-plugging with a card slot in a card slot coupled to a processor based system utilizes a biasing circuit for ensuring that the input voltage to the load of the adapter card is of a sufficient magnitude. The circuit also includes a FET/feedback circuit for opening and closing the circuit provided between the input voltage to the adapter card and the load. This FET/feedback circuit operates as a constant current source to charge the input capacitance of the load and converts to a switched mode when the load capacitance is fully charged. The biasing circuit controls the FET/feedback circuit so that it remains open during hot-plugging of the adapter card into the card slot to alleviate pin arching. A monitor/timer circuit prevents the FET/feedback circuit from operating in the constant-current mode for no longer than a predetermined amount of time. A latch circuit is provided to turn off the FET within the FET/feedback circuit upon sensing of a transient current through the load.

Low power, high performance junction transistor

Abstract: An improved junction transistor requiring low power and having high performance is described. The transistor includes a substrate, a well region of a first conductivity type, and source and drain regions of a second conductivity type separated by a channel region. The transistor further includes a gate region positioned on the surface of the substrate over the channel region, and a buried region of the first conductivity type is positioned within the well region and below the surface of the substrate. The buried region has a dopant concentration of the first conductivity type sufficiently high to slow the growth of source-drain depletion regions and diminish the likelihood of punch through. The buried region may take the form of a buried electrode region or a retrograde well in alternate embodiments. The device is characterized by a gate threshold voltage of at most about 150 mV which can be electrically adjusted using back biasing or floating gate techniques.

Microdischarges of AC-coupled silicon strip sensors

Abstract: Microdischarge at the edges of strips in AC-coupled silicon strip sensors has been investigated. A steep increase in the leakage current (breakdown) and a sudden onset of burst noise were observed at a low reverse-bias voltage when the bias potential was across the AC-coupling capacitor. This can be explained by the occurrence of microdischarges along the edges of strips. These discharges have been confirmed by observing IR light emission. A calculation of the field strength at the strip edge suggests that a fringe field of the external electrode generates the microdischarge at the strip edge when the bias voltage is 50–80 V. This is consistent with our observations. We discuss a design for AC-coupled sensors that eliminates this discharge problem.

Treatment of rotational isomeric states. III. The use of biasing potentials

Abstract: A technique is described to determine umbrella biasing potentials that can be used to enhance sampling of rotational isomeric states in molecular simulations of polypeptides in water. The analytical biasing potential functions are obtained through fitting of potentials of mean force obtained by thermodynamic integration simulations to a small number of functions used to describe dihedral torsion. The resulting dramatic increase in efficiency of sampling is illustrated by comparison of molecular simulations of the alanine–dipeptide molecule in aqueous solution, with and without the use of the biasing potentials. The same biasing potentials were used in simulations of the alanine–tripeptide and the alanine–heptapeptide in aqueous solution. Similar dramatic increases in sampling efficiency were observed for these simulations, when the biasing potentials were applied, which suggests that these biasing potentials, although determined for the dipeptide, may be transferable to larger peptide chains. It is illustrated how the biasing potentials can be used in biasing potential annealing simulations, leading to rapid folding of peptide chains into aqueous solution structures with low energy.

Investigation of selective SiO2‐to‐Si etching in an inductively coupled high‐density plasma using fluorocarbon gases

Abstract: A recent, important development in low‐pressure plasma processing is the radio frequency inductively (RFI) coupled high density discharge. Its ability to create high densities of excited and charged species at low pressures (<10−3 Torr) makes it an attractive etching tool. In this work we have examined selective etching of SiO2 over Si using a home‐built RFI source. CHF3, C2F4, C3F6 and their mixtures with hydrogen were examined. Without biasing of the substrate strong fluorocarbon deposition occurs over the investigated pressure range from 5 to 20 mTorr. As the pressure increases the ion current density decreases, whereas the fluorocarbon deposition rate increases. Both parameters increase roughly linearly with inductive rf power from 500 up to 1250 W. Etching was achieved by rf biasing. When the pressure is reduced from 20 to 6 mTorr, the oxide and silicon etch rates decrease less than 20% for all gases. The highest oxide etch rate of 830 nm/min at 350 W rf bias power is achieved for C3F6. Adding H2 dec...

Alternating Current Scanning Tunneling Microscopy and Nonlinear Spectroscopy

Abstract: In order to image and to record local spectra of the surfaces of insulating fims and solids, we have developed a tunable alternating current scanning tunneling microscope (ACSTM). This microscope has a bias voltage modulation frequency tunable over the range 0-20 GHz. We have recorded images and spectra using the amplitudes at the modulation frequency (f 0 ) and its harmonics (nf 0 ) on the surfaces of conductors, semiconductors, and insulators. We report the first atomic resolution images and nonlinear spectra using an ACSTM

A tunable microwave frequency alternating current scanning tunneling microscope

Abstract: By modulating the scanning tunneling microscope junction bias voltage at microwave frequencies, imaging and spectroscopy of insulating surfaces have become possible. In order to explore the spectroscopic capabilities of this instrument, we have developed a tunable microwave frequency alternating current scanning tunneling microscope. We combine the reliable beetle‐style sample approach with coaxial sample and tip contacts. This provides us with a stable microwave‐frequency‐compatible scanning tunneling microscope. This alternating current scanning tunneling microscope design is compatible with ultrahigh vacuum and low‐temperature operation.

Transmission of electronic information by pulse position modulation utilizing low average power

Abstract: A method and apparatus are shown for generating and transmitting very short and widely separated high frequency sine-wave pulses of electromagnetic energy into space. A transistor, a charging capacitor, and an inductor are coupled into a first series loop path to form a discharge circuit. A bias voltage source, the same charging capacitor, and a charging resistor are coupled into a second series loop path to form a recharging circuit. The bias voltage source is selected to be capable of biasing the forward conduction path of the transistor near its breakdown condition. An original information signal is sampled upon each occurrence of a periodic reference signal, and the transistor is then triggered into its breakdown or avalanche mode. The starting times of successive transmitted pulses are modified in accordance with a pulse position modulation protocol.